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| author | Egor Yusov <egor.yusov@gmail.com> | 2019-04-13 22:57:55 +0000 |
|---|---|---|
| committer | Egor Yusov <egor.yusov@gmail.com> | 2019-04-13 22:57:55 +0000 |
| commit | cbd1888d53ac6bafb94816d7eecf70a3bc24ecb0 (patch) | |
| tree | d99feacfdc675d487144a673f4bcc88899a9bc8c /Graphics | |
| parent | Improved names of default texture views (diff) | |
| download | DiligentCore-cbd1888d53ac6bafb94816d7eecf70a3bc24ecb0.tar.gz DiligentCore-cbd1888d53ac6bafb94816d7eecf70a3bc24ecb0.zip | |
Fixed issues with D3D12 staging resources and mipmap generation in Vulkan
Diffstat (limited to 'Graphics')
3 files changed, 31 insertions, 38 deletions
diff --git a/Graphics/GraphicsEngineD3D12/src/DeviceContextD3D12Impl.cpp b/Graphics/GraphicsEngineD3D12/src/DeviceContextD3D12Impl.cpp index 905f522a..6144dcea 100644 --- a/Graphics/GraphicsEngineD3D12/src/DeviceContextD3D12Impl.cpp +++ b/Graphics/GraphicsEngineD3D12/src/DeviceContextD3D12Impl.cpp @@ -77,7 +77,7 @@ namespace Diligent { GetRawAllocator(), pDeviceD3D12Impl->GetGPUDescriptorHeap(D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV), - EngineCI.DynamicDescriptorAllocationChunkSize[D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV], + EngineCI.DynamicDescriptorAllocationChunkSize[D3D12_DESCRIPTOR_HEAP_TYPE_CBV_SRV_UAV], GetContextObjectName("CBV_SRV_UAV dynamic descriptor allocator", bIsDeferred, ContextId) }, { @@ -816,32 +816,32 @@ namespace Diligent auto& CmdCtx = GetCmdContext(); D3D12_CPU_DESCRIPTOR_HANDLE RTVHandles[8]; // Do not waste time initializing array to zero D3D12_CPU_DESCRIPTOR_HANDLE DSVHandle = {}; - for (UINT i = 0; i < NumRenderTargets; ++i) - { + for (UINT i = 0; i < NumRenderTargets; ++i) + { if (auto* pRTV = ppRTVs[i]) { auto* pTexture = ValidatedCast<TextureD3D12Impl>( pRTV->GetTexture() ); TransitionOrVerifyTextureState(CmdCtx, *pTexture, StateTransitionMode, RESOURCE_STATE_RENDER_TARGET, "Setting render targets (DeviceContextD3D12Impl::CommitRenderTargets)"); - RTVHandles[i] = pRTV->GetCPUDescriptorHandle(); + RTVHandles[i] = pRTV->GetCPUDescriptorHandle(); VERIFY_EXPR(RTVHandles[i].ptr != 0); } - } + } - if (pDSV) - { + if (pDSV) + { auto* pTexture = ValidatedCast<TextureD3D12Impl>( pDSV->GetTexture() ); - //if (bReadOnlyDepth) - //{ - // TransitionResource(*pTexture, D3D12_RESOURCE_STATE_DEPTH_READ); - // m_pCommandList->OMSetRenderTargets( NumRTVs, RTVHandles, FALSE, &DSV->GetDSV_DepthReadOnly() ); - //} - //else - { + //if (bReadOnlyDepth) + //{ + // TransitionResource(*pTexture, D3D12_RESOURCE_STATE_DEPTH_READ); + // m_pCommandList->OMSetRenderTargets( NumRTVs, RTVHandles, FALSE, &DSV->GetDSV_DepthReadOnly() ); + //} + //else + { TransitionOrVerifyTextureState(CmdCtx, *pTexture, StateTransitionMode, RESOURCE_STATE_DEPTH_WRITE, "Setting depth-stencil buffer (DeviceContextD3D12Impl::CommitRenderTargets)"); DSVHandle = pDSV->GetCPUDescriptorHandle(); VERIFY_EXPR(DSVHandle.ptr != 0); - } - } + } + } VERIFY_EXPR(NumRenderTargets > 0 || DSVHandle.ptr != 0); // No need to flush resource barriers as this is a CPU-side command @@ -898,7 +898,7 @@ namespace Diligent VERIFY(pBuffD3D12->GetDesc().Usage != USAGE_DYNAMIC, "Dynamic buffers must be updated via Map()"); constexpr size_t DefaultAlginment = 16; auto TmpSpace = m_DynamicHeap.Allocate(Size, DefaultAlginment, m_ContextFrameNumber); - memcpy(TmpSpace.CPUAddress, pData, Size); + memcpy(TmpSpace.CPUAddress, pData, Size); UpdateBufferRegion(pBuffD3D12, TmpSpace, Offset, Size, StateTransitionMode); } @@ -1145,7 +1145,7 @@ namespace Diligent SrcSubResIndex, 1, // Num subresources 0, // The offset, in bytes, to the resource. - &DstLocation.PlacedFootprint, + &SrcLocation.PlacedFootprint, nullptr, nullptr, nullptr @@ -1211,11 +1211,11 @@ namespace Diligent D3D12_RESOURCE_BARRIER BarrierDesc; if (StateTransitionRequired) { - BarrierDesc.Type = D3D12_RESOURCE_BARRIER_TYPE_TRANSITION; - BarrierDesc.Transition.pResource = TextureD3D12.GetD3D12Resource(); - BarrierDesc.Transition.Subresource = DstSubResIndex; - BarrierDesc.Transition.StateBefore = ResourceStateFlagsToD3D12ResourceStates(TextureD3D12.GetState()); - BarrierDesc.Transition.StateAfter = D3D12_RESOURCE_STATE_COPY_DEST; + BarrierDesc.Type = D3D12_RESOURCE_BARRIER_TYPE_TRANSITION; + BarrierDesc.Transition.pResource = TextureD3D12.GetD3D12Resource(); + BarrierDesc.Transition.Subresource = DstSubResIndex; + BarrierDesc.Transition.StateBefore = ResourceStateFlagsToD3D12ResourceStates(TextureD3D12.GetState()); + BarrierDesc.Transition.StateAfter = D3D12_RESOURCE_STATE_COPY_DEST; BarrierDesc.Flags = D3D12_RESOURCE_BARRIER_FLAG_NONE; pCmdList->ResourceBarrier(1, &BarrierDesc); } @@ -1441,14 +1441,13 @@ namespace Diligent D3D12_PLACED_SUBRESOURCE_FOOTPRINT Footprint = {}; UINT64 TotalBytes = 0; UINT NumRows = 0; - UINT64 RowStride = 0; pd3d12Device->GetCopyableFootprints(&d3d12TexDesc, Subres, 1, // Num subresources 0, // The offset, in bytes, to the resource. &Footprint, &NumRows, - &RowStride, + nullptr, &TotalBytes ); @@ -1475,8 +1474,8 @@ namespace Diligent // Map() invalidates the CPU cache, when necessary, so that CPU reads to this address // reflect any modifications made by the GPU. TextureD3D12.GetD3D12Resource()->Map(0, &InvalidateRange, &MappedData.pData); - MappedData.Stride = static_cast<Uint32>(RowStride); - MappedData.DepthStride = static_cast<Uint32>(RowStride * NumRows); + MappedData.Stride = static_cast<Uint32>(Footprint.Footprint.RowPitch); + MappedData.DepthStride = static_cast<Uint32>(Footprint.Footprint.RowPitch * NumRows); } else { diff --git a/Graphics/GraphicsEngineVulkan/src/GenerateMipsVkHelper.cpp b/Graphics/GraphicsEngineVulkan/src/GenerateMipsVkHelper.cpp index 79e60fab..4546ddac 100644 --- a/Graphics/GraphicsEngineVulkan/src/GenerateMipsVkHelper.cpp +++ b/Graphics/GraphicsEngineVulkan/src/GenerateMipsVkHelper.cpp @@ -304,9 +304,11 @@ namespace Diligent auto BottomMip = ViewDesc.NumMipLevels - 1; for (uint32_t TopMip = 0; TopMip < BottomMip; ) { - // In Vulkan all subresources of a view must be transitioned to the same layout, so + // In Vulkan, all subresources of a view must be transitioned to the same layout, so // we can't bind the entire texture and have to bind single mip level at a time - pSrcMipVar->Set(TexView.GetMipLevelSRV(TopMip)); + auto SrcMipLevelSRV = TexView.GetMipLevelSRV(TopMip); + VERIFY_EXPR(SrcMipLevelSRV != nullptr); + pSrcMipVar->Set(SrcMipLevelSRV); uint32_t SrcWidth = std::max(TexDesc.Width >> (TopMip + ViewDesc.MostDetailedMip), 1u); uint32_t SrcHeight = std::max(TexDesc.Height >> (TopMip + ViewDesc.MostDetailedMip), 1u); diff --git a/Graphics/GraphicsEngineVulkan/src/TextureVkImpl.cpp b/Graphics/GraphicsEngineVulkan/src/TextureVkImpl.cpp index eaf88459..e99e45f1 100644 --- a/Graphics/GraphicsEngineVulkan/src/TextureVkImpl.cpp +++ b/Graphics/GraphicsEngineVulkan/src/TextureVkImpl.cpp @@ -573,15 +573,7 @@ void TextureVkImpl::CreateViewInternal(const TextureViewDesc& ViewDesc, ITexture new (ppMipLevelView) TextureViewVkImpl::MipLevelViewAutoPtrType(pMipLevelViewVk, STDDeleter<TextureViewVkImpl, FixedBlockMemoryAllocator>(TexViewAllocator)); }; - if ((MipLevel % 4) == 0) - { - // Mip levles are generated 4 at a time, so we only need SRV for every 4-th level - CreateMipLevelView(TEXTURE_VIEW_SHADER_RESOURCE, MipLevel, &pMipLevelViews[MipLevel * 2]); - } - else - { - new (&pMipLevelViews[MipLevel * 2]) TextureViewVkImpl::MipLevelViewAutoPtrType{}; - } + CreateMipLevelView(TEXTURE_VIEW_SHADER_RESOURCE, MipLevel, &pMipLevelViews[MipLevel * 2]); CreateMipLevelView(TEXTURE_VIEW_UNORDERED_ACCESS, MipLevel, &pMipLevelViews[MipLevel * 2 + 1]); } pViewVk->AssignMipLevelViews(pMipLevelViews); |
