From 7accb78ce40aa9aa50cd50e5adbf30f39d06116b Mon Sep 17 00:00:00 2001 From: Egor Yusov Date: Thu, 20 Sep 2018 20:34:00 -0700 Subject: Refactored device object release queues --- Graphics/GraphicsEngine/include/BufferBase.h | 4 ++ .../GraphicsEngine/include/PipelineStateBase.h | 4 ++ Graphics/GraphicsEngine/include/RenderDeviceBase.h | 20 ++++--- Graphics/GraphicsEngine/include/SwapChainBase.h | 2 + Graphics/GraphicsEngine/include/TextureBase.h | 8 ++- Graphics/GraphicsEngine/interface/Buffer.h | 16 ++++-- Graphics/GraphicsEngine/interface/PipelineState.h | 3 + Graphics/GraphicsEngine/interface/Texture.h | 67 ++++++++++------------ 8 files changed, 69 insertions(+), 55 deletions(-) (limited to 'Graphics/GraphicsEngine') diff --git a/Graphics/GraphicsEngine/include/BufferBase.h b/Graphics/GraphicsEngine/include/BufferBase.h index f602027e..0170dd20 100644 --- a/Graphics/GraphicsEngine/include/BufferBase.h +++ b/Graphics/GraphicsEngine/include/BufferBase.h @@ -104,6 +104,10 @@ public: } } + + Uint64 DeviceQueuesMask = pDevice->GetCommandQueueMask(); + DEV_CHECK_ERR( (m_Desc.CommandQueueMask & DeviceQueuesMask) != 0, "No bits in the command queue mask (0x", std::hex, m_Desc.CommandQueueMask, ") correspond to one of ", pDevice->GetCommandQueueCount(), " available device command queues"); + m_Desc.CommandQueueMask &= DeviceQueuesMask; } IMPLEMENT_QUERY_INTERFACE_IN_PLACE( IID_Buffer, TDeviceObjectBase ) diff --git a/Graphics/GraphicsEngine/include/PipelineStateBase.h b/Graphics/GraphicsEngine/include/PipelineStateBase.h index 5a8f6a65..83e1a44b 100644 --- a/Graphics/GraphicsEngine/include/PipelineStateBase.h +++ b/Graphics/GraphicsEngine/include/PipelineStateBase.h @@ -165,6 +165,10 @@ public: else VERIFY(m_Strides[BuffSlot] == It->Stride, "Incosistent stride"); } + + Uint64 DeviceQueuesMask = pDevice->GetCommandQueueMask(); + DEV_CHECK_ERR( (m_Desc.CommandQueueMask & DeviceQueuesMask) != 0, "No bits in the command queue mask (0x", std::hex, m_Desc.CommandQueueMask, ") correspond to one of ", pDevice->GetCommandQueueCount(), " available device command queues"); + m_Desc.CommandQueueMask &= DeviceQueuesMask; } ~PipelineStateBase() diff --git a/Graphics/GraphicsEngine/include/RenderDeviceBase.h b/Graphics/GraphicsEngine/include/RenderDeviceBase.h index fcc3f4d6..62860330 100644 --- a/Graphics/GraphicsEngine/include/RenderDeviceBase.h +++ b/Graphics/GraphicsEngine/include/RenderDeviceBase.h @@ -215,16 +215,17 @@ public: m_TextureFormatsInfo (TEX_FORMAT_NUM_FORMATS, TextureFormatInfoExt(), STD_ALLOCATOR_RAW_MEM(TextureFormatInfoExt, RawMemAllocator, "Allocator for vector") ), m_TexFmtInfoInitFlags (TEX_FORMAT_NUM_FORMATS, false, STD_ALLOCATOR_RAW_MEM(bool, RawMemAllocator, "Allocator for vector") ), m_wpDeferredContexts (NumDeferredContexts, RefCntWeakPtr(), STD_ALLOCATOR_RAW_MEM(RefCntWeakPtr, RawMemAllocator, "Allocator for vector< RefCntWeakPtr >")), - m_TexObjAllocator (RawMemAllocator, TextureObjSize, 64), - m_TexViewObjAllocator (RawMemAllocator, TexViewObjSize, 64), - m_BufObjAllocator (RawMemAllocator, BufferObjSize, 128), - m_BuffViewObjAllocator (RawMemAllocator, BuffViewObjSize, 128), - m_ShaderObjAllocator (RawMemAllocator, ShaderObjSize, 32), - m_SamplerObjAllocator (RawMemAllocator, SamplerObjSize, 32), - m_PSOAllocator (RawMemAllocator, PSOSize, 128), - m_SRBAllocator (RawMemAllocator, SRBSize, 1024), + m_RawMemAllocator (RawMemAllocator), + m_TexObjAllocator (RawMemAllocator, TextureObjSize, 64), + m_TexViewObjAllocator (RawMemAllocator, TexViewObjSize, 64), + m_BufObjAllocator (RawMemAllocator, BufferObjSize, 128), + m_BuffViewObjAllocator (RawMemAllocator, BuffViewObjSize, 128), + m_ShaderObjAllocator (RawMemAllocator, ShaderObjSize, 32), + m_SamplerObjAllocator (RawMemAllocator, SamplerObjSize, 32), + m_PSOAllocator (RawMemAllocator, PSOSize, 128), + m_SRBAllocator (RawMemAllocator, SRBSize, 1024), m_ResMappingAllocator (RawMemAllocator, sizeof(ResourceMappingImpl), 16), - m_FenceAllocator (RawMemAllocator, FenceSize, 16) + m_FenceAllocator (RawMemAllocator, FenceSize, 16) { // Initialize texture format info for( Uint32 Fmt = TEX_FORMAT_UNKNOWN; Fmt < TEX_FORMAT_NUM_FORMATS; ++Fmt ) @@ -379,6 +380,7 @@ protected: /// Weak references to deferred contexts. std::vector< RefCntWeakPtr, STDAllocatorRawMem > > m_wpDeferredContexts; + IMemoryAllocator& m_RawMemAllocator; ///< Raw memory allocator FixedBlockMemoryAllocator m_TexObjAllocator; ///< Allocator for texture objects FixedBlockMemoryAllocator m_TexViewObjAllocator; ///< Allocator for texture view objects FixedBlockMemoryAllocator m_BufObjAllocator; ///< Allocator for buffer objects diff --git a/Graphics/GraphicsEngine/include/SwapChainBase.h b/Graphics/GraphicsEngine/include/SwapChainBase.h index 2f74d3c1..25580e2c 100644 --- a/Graphics/GraphicsEngine/include/SwapChainBase.h +++ b/Graphics/GraphicsEngine/include/SwapChainBase.h @@ -26,6 +26,8 @@ /// \file /// Implementation of the Diligent::SwapChainBase template class +#include "RenderDevice.h" +#include "DeviceContext.h" #include "SwapChain.h" #include "DeviceObjectBase.h" #include "Errors.h" diff --git a/Graphics/GraphicsEngine/include/TextureBase.h b/Graphics/GraphicsEngine/include/TextureBase.h index 3321a4df..0b9f923f 100644 --- a/Graphics/GraphicsEngine/include/TextureBase.h +++ b/Graphics/GraphicsEngine/include/TextureBase.h @@ -59,7 +59,7 @@ void ValidateMapTextureParams(const TextureDesc& TexDesc, /// (Diligent::TextureViewD3D11Impl, Diligent::TextureViewD3D12Impl, /// Diligent::TextureViewGLImpl or Diligent::TextureViewVkImpl). /// \tparam TTexViewObjAllocator - type of the allocator that is used to allocate memory for the texture view object instances -template +template class TextureBase : public DeviceObjectBase { public: @@ -74,7 +74,7 @@ public: /// must not keep a strong reference to the device TextureBase( IReferenceCounters* pRefCounters, TTexViewObjAllocator& TexViewObjAllocator, - TRenderDeviceImpl* pDevice, + TRenderDeviceImpl* pDevice, const TextureDesc& Desc, bool bIsDeviceInternal = false ) : TDeviceObjectBase( pRefCounters, pDevice, Desc, bIsDeviceInternal ), @@ -111,6 +111,10 @@ public: } } + Uint64 DeviceQueuesMask = pDevice->GetCommandQueueMask(); + DEV_CHECK_ERR( (m_Desc.CommandQueueMask & DeviceQueuesMask) != 0, "No bits in the command queue mask (0x", std::hex, m_Desc.CommandQueueMask, ") correspond to one of ", pDevice->GetCommandQueueCount(), " available device command queues"); + m_Desc.CommandQueueMask &= DeviceQueuesMask; + // Validate correctness of texture description ValidateTextureDesc( this->m_Desc ); } diff --git a/Graphics/GraphicsEngine/interface/Buffer.h b/Graphics/GraphicsEngine/interface/Buffer.h index dad8af5f..4de1898c 100644 --- a/Graphics/GraphicsEngine/interface/Buffer.h +++ b/Graphics/GraphicsEngine/interface/Buffer.h @@ -96,6 +96,9 @@ struct BufferDesc : DeviceObjectAttribs /// created for this buffer. Uint32 ElementByteStride = 0; + /// Defines which command queues this buffer can be used with + Uint64 CommandQueueMask = 1; + /// Tests if two structures are equivalent /// \param [in] RHS - reference to the structure to perform comparison with @@ -106,12 +109,13 @@ struct BufferDesc : DeviceObjectAttribs /// the buffer description. bool operator == (const BufferDesc& RHS)const { - return uiSizeInBytes == RHS.uiSizeInBytes && - BindFlags == RHS.BindFlags && - Usage == RHS.Usage && - CPUAccessFlags == RHS.CPUAccessFlags && - Mode == RHS.Mode && - ElementByteStride == RHS.ElementByteStride; + return uiSizeInBytes == RHS.uiSizeInBytes && + BindFlags == RHS.BindFlags && + Usage == RHS.Usage && + CPUAccessFlags == RHS.CPUAccessFlags && + Mode == RHS.Mode && + ElementByteStride == RHS.ElementByteStride && + CommandQueueMask == RHS.CommandQueueMask; } }; diff --git a/Graphics/GraphicsEngine/interface/PipelineState.h b/Graphics/GraphicsEngine/interface/PipelineState.h index 0c642f3f..ca12dda4 100644 --- a/Graphics/GraphicsEngine/interface/PipelineState.h +++ b/Graphics/GraphicsEngine/interface/PipelineState.h @@ -151,6 +151,9 @@ struct PipelineStateDesc : DeviceObjectAttribs /// binding object instances. Uint32 SRBAllocationGranularity = 1; + /// Defines which command queues this pipeline state can be used with + Uint64 CommandQueueMask = 1; + /// Graphics pipeline state description. This memeber is ignored if IsComputePipeline == True GraphicsPipelineDesc GraphicsPipeline; diff --git a/Graphics/GraphicsEngine/interface/Texture.h b/Graphics/GraphicsEngine/interface/Texture.h index ba739d96..d9da8c8f 100644 --- a/Graphics/GraphicsEngine/interface/Texture.h +++ b/Graphics/GraphicsEngine/interface/Texture.h @@ -82,54 +82,56 @@ struct OptimizedClearValue struct TextureDesc : DeviceObjectAttribs { /// Texture type. See Diligent::RESOURCE_DIMENSION for details. - RESOURCE_DIMENSION Type; + RESOURCE_DIMENSION Type = RESOURCE_DIM_UNDEFINED; /// Texture width, in pixels. - Uint32 Width; + Uint32 Width = 0; /// Texture height, in pixels. - Uint32 Height; + Uint32 Height = 0; union { /// For a 1D array or 2D array, number of array slices - Uint32 ArraySize; + Uint32 ArraySize = 1; /// For a 3D texture, number of depth slices Uint32 Depth; }; /// Texture format, see Diligent::TEXTURE_FORMAT. - TEXTURE_FORMAT Format; + TEXTURE_FORMAT Format = TEX_FORMAT_UNKNOWN; /// Number of Mip levels in the texture. Multisampled textures can only have 1 Mip level. /// Specify 0 to generate full mipmap chain. - Uint32 MipLevels; + Uint32 MipLevels = 1; /// Number of samples.\n /// Only 2D textures or 2D texture arrays can be multisampled. - Uint32 SampleCount; + Uint32 SampleCount = 1; /// Texture usage. See Diligent::USAGE for details. - USAGE Usage; + USAGE Usage = USAGE_DEFAULT; /// Bind flags, see Diligent::BIND_FLAGS for details. \n /// The following bind flags are allowed: /// Diligent::BIND_SHADER_RESOURCE, Diligent::BIND_RENDER_TARGET, Diligent::BIND_DEPTH_STENCIL, /// Diligent::and BIND_UNORDERED_ACCESS. \n /// Multisampled textures cannot have Diligent::BIND_UNORDERED_ACCESS flag set - Uint32 BindFlags; + Uint32 BindFlags = 0; /// CPU access flags or 0 if no CPU access is allowed, /// see Diligent::CPU_ACCESS_FLAG for details. - Uint32 CPUAccessFlags; + Uint32 CPUAccessFlags = 0; - /// Miscellaneous flags, see Diligent::MISC_TEXTURE_FLAG for details. - Uint32 MiscFlags; + Uint32 MiscFlags = 0; /// Optimized clear value OptimizedClearValue ClearValue; + /// Defines which command queues this texture can be used with + Uint64 CommandQueueMask = 1; + /// Initializes the structure members with default values /// Default values: @@ -146,20 +148,8 @@ struct TextureDesc : DeviceObjectAttribs /// BindFlags | 0 /// CPUAccessFlags | 0 /// MiscFlags | 0 - TextureDesc() : - Type(RESOURCE_DIM_UNDEFINED), - Width(0), - Height(0), - ArraySize(1), - Format(TEX_FORMAT_UNKNOWN), - MipLevels(1), - SampleCount(1), - Usage(USAGE_DEFAULT), - BindFlags(0), - CPUAccessFlags(0), - MiscFlags(0) - { - } + /// CommandQueueMask| 1 + TextureDesc() {} /// Tests if two structures are equivalent @@ -174,18 +164,19 @@ struct TextureDesc : DeviceObjectAttribs // Name is primarily used for debug purposes and does not affect the state. // It is ignored in comparison operation. return // strcmp(Name, RHS.Name) == 0 && - Type == RHS.Type && - Width == RHS.Width && - Height == RHS.Height && - ArraySize == RHS.ArraySize && - Format == RHS.Format && - MipLevels == RHS.MipLevels && - SampleCount == RHS.SampleCount && - Usage == RHS.Usage && - BindFlags == RHS.BindFlags && - CPUAccessFlags == RHS.CPUAccessFlags && - MiscFlags == RHS.MiscFlags && - ClearValue == RHS.ClearValue; + Type == RHS.Type && + Width == RHS.Width && + Height == RHS.Height && + ArraySize == RHS.ArraySize && + Format == RHS.Format && + MipLevels == RHS.MipLevels && + SampleCount == RHS.SampleCount && + Usage == RHS.Usage && + BindFlags == RHS.BindFlags && + CPUAccessFlags == RHS.CPUAccessFlags && + MiscFlags == RHS.MiscFlags && + ClearValue == RHS.ClearValue && + CommandQueueMask == RHS.CommandQueueMask; } }; -- cgit v1.2.3