git.s-ol.nu hw/0x13.ergo / 2997ea6
add KiBot config, clean silkscreen s-ol 1 year, 2 months ago
4 changed file(s) with 173 addition(s) and 22 deletion(s). Raw diff Collapse all Expand all
+44
-21
0x13.ergo.kicad_pcb less more
44 )
55
66 (paper "A4")
7 (title_block
8 (title "0x13.ergo ${VCS_TAG}")
9 (date "${VCS_DATE}")
10 (rev "${VCS_REV}")
11 )
12
713 (layers
814 (0 "F.Cu" signal)
915 (31 "B.Cu" signal)
8591 (outputdirectory "")
8692 )
8793 )
94
95 (property "VCS_DATE" "0000-00-00")
96 (property "VCS_REV" "0000000")
97 (property "VCS_TAG" "r?")
8898
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8380 (gr_text "s-ol.nu/0x13.ergo\n${VCS_DATE} / ${VCS_REV}" (at 87.7 85.9) (layer "B.SilkS") (tstamp 1b0efe6c-acf9-459d-9d95-80881d9b1096)
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8382 )
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8384 (effects (font (size 2 2) (thickness 0.3)) (justify left mirror))
8385 )
8386 (gr_text "s-ol.nu/0x13.ergo\n${VCS_DATE} / ${VCS_REV}" (at 87.7 85.9) (layer "F.SilkS") (tstamp 40393932-ef88-466d-8063-76b07b80acd6)
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8389 (gr_text "0x13.ergo ${VCS_TAG}" (at 107.3 69.4 30) (layer "F.SilkS") (tstamp f14d9db0-e78f-43d2-9c9e-73c6d6c49700)
8390 (effects (font (size 2 2) (thickness 0.3)) (justify left))
8391 )
83708392
83718393 (segment (start 83.560521 40.949521) (end 83.560521 39.160521) (width 0.2) (layer "F.Cu") (net 1) (tstamp 37592fb4-c609-4a45-b343-b46ff8fcd7a2))
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89799001 (segment (start 53.335521 32.135521) (end 53.0245 31.8245) (width 0.2) (layer "F.Cu") (net 13) (tstamp 21be2b04-e5f9-45df-9a18-03a3d1469834))
89809002 (segment (start 125.284114 26.89133) (end 123.65 28.525444) (width 0.5) (layer "F.Cu") (net 13) (tstamp 352fe492-16f9-46c8-a326-e698bf73b2a8))
9003 (segment (start 123.65 37.55) (end 125 38.9) (width 0.5) (layer "F.Cu") (net 13) (tstamp b0a2a557-d0f3-498f-bf71-402b52d7a559))
89819004 (segment (start 123.65 28.525444) (end 123.65 37.55) (width 0.5) (layer "F.Cu") (net 13) (tstamp f49146a4-9708-419a-ae7a-192bacacc168))
89829005 (via (at 63.61235 87.487179) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 13) (tstamp 0d0ddfe6-8edb-4705-a6a5-af51e979594f))
89839006 (via (at 73.9 68.93909) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 13) (tstamp 11d0c635-6bbc-43c2-9f3a-0c8c62e295fc))
+5
-1
0x13.ergo.kicad_pro less more
433433 ""
434434 ]
435435 ],
436 "text_variables": {}
436 "text_variables": {
437 "VCS_DATE": "0000-00-00",
438 "VCS_REV": "0000000",
439 "VCS_TAG": "r?"
440 }
437441 }
+6
-0
0x13.ergo.kicad_sch less more
22 (uuid 8c010c70-cb4b-4e48-9349-d7669f7558d0)
33
44 (paper "A4")
5
6 (title_block
7 (title "0x13.ergo ${VCS_TAG}")
8 (date "${VCS_DATE}")
9 (rev "${VCS_REV}")
10 )
511
612 (lib_symbols
713 (symbol "Connector:AudioJack3" (in_bom yes) (on_board yes)
+118
-0
config.kibot.yaml less more
0 kibot:
1 version: 1
2
3 preflight:
4 check_zone_fills: true
5 run_drc: false
6 run_erc: false
7
8 set_text_variables:
9 - name: 'VCS_DATE'
10 command: 'git log -1 --format="%as"'
11
12 - name: 'VCS_REV'
13 command: 'git rev-parse --short HEAD'
14
15 - name: 'VCS_TAG'
16 command: 'git describe --tags --exact-match HEAD || echo "r?"'
17
18 global:
19 dir: 'dist/%d_%f_%r'
20 output: '%i.%x'
21 solder_mask_color: 'black'
22 silk_screen_color: 'white'
23
24 filters:
25 - name: 'exclude_virtual'
26 type: 'generic'
27 exclude_any:
28 - column: Value
29 regex: 'Jumper'
30 - column: Value
31 regex: '^Edge.*'
32
33 outputs:
34 - type: 'ibom'
35 name: 'ibom'
36 options:
37 layer_view: 'B'
38 dnf_filter: exclude_virtual
39
40 - type: 'bom'
41 name: 'bom'
42 options:
43 exclude_filter: exclude_virtual
44
45 - type: 'position'
46 name: 'pnp'
47 options:
48 output: 'placement.%x'
49 separate_files_for_front_and_back: false
50
51 - type: 'pcbdraw'
52 name: 'pcb_front'
53 options:
54 output: 'board_front.%x'
55 - type: 'pcbdraw'
56 name: 'pcb_back'
57 options:
58 output: 'board_back.%x'
59 bottom: true
60
61 - type: 'svg_sch_print'
62 name: 'schematic'
63
64 - name: jlc_gerbers
65 comment: Gerbers compatible with JLCPCB
66 type: gerber
67 dir: 'dist/%d_%f_%r/jlc'
68 options: &gerber_options
69 exclude_edge_layer: true
70 exclude_pads_from_silkscreen: true
71 plot_sheet_reference: false
72 plot_footprint_refs: true
73 plot_footprint_values: false
74 force_plot_invisible_refs_vals: false
75 tent_vias: true
76 use_protel_extensions: true
77 create_gerber_job_file: false
78 disable_aperture_macros: true
79 gerber_precision: 4.6
80 use_gerber_x2_attributes: false
81 use_gerber_net_attributes: false
82 line_width: 0.1
83 subtract_mask_from_silk: true
84 inner_extension_pattern: '.gp%n'
85 layers:
86 - F.Cu
87 - B.Cu
88 - F.SilkS
89 - B.SilkS
90 - F.Mask
91 - B.Mask
92 - Edge.Cuts
93
94 - name: jlc_drills
95 comment: Drill files compatible with JLCPCB
96 type: excellon
97 dir: 'dist/%d_%f_%r/jlc'
98 options:
99 pth_and_npth_single_file: false
100 pth_id: '-PTH'
101 npth_id: '-NPTH'
102 metric_units: true
103 map: gerber
104 route_mode_for_oval_holes: false
105 output: "%f%i.%x"
106
107 - name: jlc
108 comment: ZIP file for JLCPCB
109 type: compress
110 dir: 'dist'
111 options:
112 output: '%d_%f_%r_jlc.zip'
113 files:
114 - from_output: jlc_gerbers
115 dest: /
116 - from_output: jlc_drills
117 dest: /