git.s-ol.nu hw/0x33.board/hardware / 2fd9b86
update kibot config s-ol 11 days ago
3 changed file(s) with 28 addition(s) and 203 deletion(s). Raw diff Collapse all Expand all
22
33 preflight:
44 check_zone_fills: true
5 run_drc: true
6 run_erc: true
7
8 filters:
9 - filter: 'Ignore R7/8 overlap with R7/8alt'
10 error: 'courtyards_overlap'
11 regex: 'Footprint R[78]'
5 run_drc: false
6 run_erc: false
127
138 set_text_variables:
149 - name: 'VCS_DATE'
1712 - name: 'VCS_REV'
1813 command: 'git rev-parse --short HEAD'
1914
15 - name: 'VCS_TAG'
16 command: 'git describe --tags --exact-match HEAD || echo "r?"'
17
2018 global:
21 dir: 'dist/%d_%f_%r'
19 dir: 'dist/%d_0x33.board_%r'
2220 output: '%i.%x'
2321 solder_mask_color: 'black'
2422 silk_screen_color: 'white'
2523
24 filters:
25 - name: 'exclude_virtual'
26 type: 'generic'
27 exclude_any:
28 - column: Footprint
29 regex: 'Jumper'
30 - column: Value
31 regex: '^PMOD/GPIO$'
32 - column: Value
33 regex: 'Outline'
34
2635 outputs:
27 - type: 'boardview'
28 name: 'boardview'
36 - type: 'ibom'
37 name: 'ibom'
38 options:
39 layer_view: 'B'
40 dnf_filter: exclude_virtual
2941
3042 - type: 'bom'
3143 name: 'bom'
44 options:
45 exclude_filter: exclude_virtual
3246
33 # # PcbDraw - Beautiful 2D PCB render:
34 # # Uses configurable colors.
35 # # Can also render the components if the 2D models are available
36 # - name: 'pcbdraw_example'
37 # comment: 'Exports the PCB as a 2D model (SVG, PNG or JPG).'
38 # type: 'pcbdraw'
39 # dir: 'Example/pcbdraw_dir'
40 # options:
41 # # [boolean=false] Render the bottom side of the board (default is top side)
42 # bottom: false
43 # # [string|list(string)=''] Name of the filter to mark components as not fitted.
44 # # A short-cut to use for simple cases where a variant is an overkill
45 # dnf_filter: ''
46 # # [number=300] [10,1200] Dots per inch (resolution) of the generated image
47 # dpi: 300
48 # # [string='svg'] [svg,png,jpg] Output format. Only used if no `output` is specified
49 # format: 'svg'
50 # # [list(string)=[]] List of components to highlight
51 # highlight: []
52 # # [list(string)=[]] List of libraries
53 # libs: []
54 # # [boolean=false] Mirror the board
55 # mirror: false
56 # # [boolean=false] Do not make holes transparent
57 # no_drillholes: false
58 # # [string='%f-%i%v.%x'] Name for the generated file. Affected by global options
59 # output: '%f-%i%v.%x'
60 # # [boolean=false] Show placeholder for missing components
61 # placeholder: false
62 # # [dict|None] Replacements for PCB references using components (lib:component)
63 # remap:
64 # # [list(string)|string=none] [none,all] List of components to draw, can be also a string for none or all.
65 # # The default is none
66 # show_components: none
67 # # [string|dict] PCB style (colors). An internal name, the name of a JSON file or the style options
68 # style:
69 # # [string='#4ca06c'] color for the board without copper (covered by solder mask)
70 # board: '#4ca06c'
71 # # [string='#9c6b28'] color for the PCB core (not covered by solder mask)
72 # clad: '#9c6b28'
73 # # [string='#417e5a'] color for the copper zones (covered by solder mask)
74 # copper: '#417e5a'
75 # # [boolean=false] highlight over the component (not under)
76 # highlight_on_top: false
77 # # [number=1.5] [0,1000] how much the highlight extends around the component [mm]
78 # highlight_padding: 1.5
79 # # [string='stroke:none;fill:#ff0000;opacity:0.5;'] SVG code for the highlight style
80 # highlight_style: 'stroke:none;fill:#ff0000;opacity:0.5;'
81 # # [string='#000000'] color for the outline
82 # outline: '#000000'
83 # # [string='#b5ae30'] color for the exposed pads (metal finish)
84 # pads: '#b5ae30'
85 # # [string='#f0f0f0'] color for the silk screen
86 # silk: '#f0f0f0'
87 # # [string='#bf2600'] color for the V-CUTS
88 # vcut: '#bf2600'
89 # # [string=''] Board variant to apply
90 # variant: ''
91 # # [boolean=false] Render V-CUTS on the Cmts.User layer
92 # vcuts: false
93 # # [string='visible'] [visible,all,none] Using visible only the warnings about components in the visible side are generated
94 # warnings: 'visible'
95
96 # Pick & place:
97 # This output is what you get from the 'File/Fabrication output/Footprint poistion (.pos) file' menu in pcbnew.
9847 - type: 'position'
9948 name: 'pnp'
10049 options:
50 output: 'placement.%x'
10151 separate_files_for_front_and_back: false
10252
103 # # STEP (ISO 10303-21 Clear Text Encoding of the Exchange Structure):
104 # # This is the most common 3D format for exchange purposes.
105 # # This output is what you get from the 'File/Export/STEP' menu in pcbnew.
106 # - name: 'step_example'
107 # comment: 'Exports the PCB as a 3D model.'
108 # type: 'step'
109 # dir: 'Example/step_dir'
110 # options:
111 # # [string|list(string)=''] Name of the filter to mark components as not fitted.
112 # # A short-cut to use for simple cases where a variant is an overkill
113 # dnf_filter: ''
114 # # [boolean=true] Downloads missing 3D models from KiCad git. Only applies to models in KISYS3DMOD
115 # download: true
116 # # [string='https://gitlab.com/kicad/libraries/kicad-packages3D/-/raw/master/'] Base URL for the KiCad 3D models
117 # kicad_3d_url: 'https://gitlab.com/kicad/libraries/kicad-packages3D/-/raw/master/'
118 # # [boolean=true] Use metric units instead of inches
119 # metric_units: true
120 # # [number=-1] The minimum distance between points to treat them as separate ones (-1 is KiCad default: 0.01 mm)
121 # min_distance: -1
122 # # [boolean=false] Used to exclude 3D models for components with 'virtual' attribute
123 # no_virtual: false
124 # # [string='grid'] Determines the coordinates origin. Using grid the coordinates are the same as you have in the design sheet.
125 # # The drill option uses the auxiliary reference defined by the user.
126 # # You can define any other origin using the format 'X,Y', i.e. '3.2,-10'
127 # origin: 'grid'
128 # # [string='%f-%i%v.%x'] Name for the generated STEP file (%i='3D' %x='step'). Affected by global options
129 # output: '%f-%i%v.%x'
130 # # [string=''] Board variant to apply
131 # variant: ''
132
133 # SVG PCB Print:
134 # This is a format to document your schematic.
13553 - type: 'svg_pcb_print'
13654 name: 'pcb'
13755 options:
13856 output: 'pcb.%x'
139 layers: all
57 layers: [F.SilkS, F.Mask, F.Cu, Edge.Cuts, B.Cu, B.Mask, B.SilkS]
14058
141 # SVG Schematic Print:
142 # This is a format to document your schematic.
14359 - type: 'svg_sch_print'
14460 name: 'schematic'
145
146 # Zip everything
147 - type: 'compress'
148 name: 'archive'
149
150 dir: 'dist'
151 options:
152 output: '%d_%f_%r.zip'
153 files:
154 - source: 'dist/%d_%f_%r/**'
+0
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jlc.kibot.yaml less more
0 kibot:
1 version: 1
2
3 preflight:
4 check_zone_fills: true
5 run_drc: false
6 run_erc: false
7
8 filters:
9 - filter: 'Ignore R7/8 overlap with R7/8alt'
10 error: 'courtyards_overlap'
11 regex: 'Footprint R[78]'
12
13 set_text_variables:
14 - name: 'VCS_DATE'
15 command: 'git log -1 --format="%as"'
16
17 - name: 'VCS_REV'
18 command: 'git rev-parse --short HEAD'
19
20 global:
21 dir: 'dist/%d_%f_%r'
22 output: '%i.%x'
23 solder_mask_color: 'black'
24 silk_screen_color: 'white'
25
26 outputs:
27 - name: jlc_gerbers
28 comment: Gerbers compatible with JLCPCB
29 type: gerber
30 dir: 'dist/%d_%f_%r/jlc'
31 options: &gerber_options
32 exclude_edge_layer: true
33 exclude_pads_from_silkscreen: true
34 plot_sheet_reference: false
35 plot_footprint_refs: true
36 plot_footprint_values: false
37 force_plot_invisible_refs_vals: false
38 tent_vias: true
39 use_protel_extensions: true
40 create_gerber_job_file: false
41 disable_aperture_macros: true
42 gerber_precision: 4.6
43 use_gerber_x2_attributes: false
44 use_gerber_net_attributes: false
45 line_width: 0.1
46 subtract_mask_from_silk: true
47 inner_extension_pattern: '.gp%n'
48 layers:
49 - F.Cu
50 - B.Cu
51 - F.SilkS
52 - B.SilkS
53 - F.Mask
54 - B.Mask
55 - Edge.Cuts
56
57 - name: jlc_drills
58 comment: Drill files compatible with JLCPCB
59 type: excellon
60 dir: 'dist/%d_%f_%r/jlc'
61 options:
62 pth_and_npth_single_file: false
63 pth_id: '-PTH'
64 npth_id: '-NPTH'
65 metric_units: true
66 map: gerber
67 route_mode_for_oval_holes: false
68 output: "%f%i.%x"
69
70 - name: jlc
71 comment: ZIP file for JLCPCB
72 type: compress
73 dir: 'dist'
74 options:
75 output: '%d_%f_%r_jlc.zip'
76 files:
77 - from_output: jlc_gerbers
78 dest: /
79 - from_output: jlc_drills
80 dest: /
39683968 (property "Reference" "SYM1" (id 0) (at 278.13 13.97 0)
39693969 (effects (font (size 1.27 1.27)) hide)
39703970 )
3971 (property "Value" "SYM_LASER_Large" (id 1) (at 278.13 25.781 0)
3971 (property "Value" "Outline" (id 1) (at 278.13 25.781 0)
39723972 (effects (font (size 1.27 1.27)) hide)
39733973 )
39743974 (property "Footprint" "local:Outline" (id 2) (at 277.876 23.495 0)
52515251 (reference "SW1") (unit 1) (value "Bootsel") (footprint "local:Jumper_SMT_2")
52525252 )
52535253 (path "/b9f97a68-ad8c-46ef-a4e0-fe67d7d4fd6b"
5254 (reference "SYM1") (unit 1) (value "SYM_LASER_Large") (footprint "local:Outline")
5254 (reference "SYM1") (unit 1) (value "Outline") (footprint "local:Outline")
52555255 )
52565256 (path "/88d67407-a46c-49ec-9b6d-89fcc7f2eaed"
52575257 (reference "U1") (unit 1) (value "USBLC6-2SC6") (footprint "Package_TO_SOT_SMD:SOT-23-6")