| 37/lui | */rd | */imm20 | |||
|---|---|---|---|---|---|
| 17/auipc | */rd | */off20 | |||
| 6f/jal | */rd | */off21 | |||
| 67/jalr | */rd | 0/subop | */rs | */off12 | |
| 63/branch | */subop | */rs1 | */rs2 | */off13 | |
| 13/opi | */rd | */subop | */rs | */imm12 | |
| 13/opi | */rd | */subop */mode | */rs | */imm7 | |
| 33/opr | */rd | */subop */mode | */rs1 | */rs2 | |
| 03/load | */rd | */width */rs */off12 | |||
| 23/store | */width */rd */off12 | */rs | |||
| 73/system | */rd | */subop | */rs | */csr | |
| 73/system | */rd | */subop | */csr | */imm5 | |
| 73/system | 0/subop/priv | 0/funct12/ecall | |||
| 73/system | 0/subop/priv | 1/funct12/ebreak | |||
| reg (rd, rs*) | 00/zero 01/ra 02/sp 03/gp 04/tp | 05/t0..07/t2 1c/t3..1f/t6 | |
|---|---|---|---|
| 8/s0 9/s1 12/s2..1b/s7 | 0a/a0..11/a7 | ||
| width | 0/b 1/h 2/w | 4/bu 5/hu | |
| subop | branch | 0/== 1/!= 4/< 5/>= | 6/<u 7/>=u |
| opi/opr | 00/mode/norm: 0/add 1/sll 2/slt 3/sltu 4/xor 5/srl 6/or 7/and | ||
| 20/mode/alt: 0/sub 5/sra | |||
| system | 1/csrrw 2/csrrs 3/csrrc | 5/csrrwi 6/csrrsi 7/csrrci | |
| csr | see priviledged spec, sect 2.2 | ||