From b4e320be45c3f1afa61d74222000ae22fd00daff Mon Sep 17 00:00:00 2001 From: s-ol Date: Tue, 6 Jul 2021 17:00:17 +0200 Subject: switch to "virt" qemu machine --- examples/ask_name.subv | 83 +++++++++++++++++++++++++++++++++++++---------- examples/hello_world.subv | 17 +++++----- qemu.sh | 2 +- 3 files changed, 76 insertions(+), 26 deletions(-) diff --git a/examples/ask_name.subv b/examples/ask_name.subv index b9e54bc..6350188 100644 --- a/examples/ask_name.subv +++ b/examples/ask_name.subv @@ -10,11 +10,14 @@ # > Sol # Hello Sol, nice to meet you! -== code 0x80000000 - # trap all but first Hart (a0 = mhartid) - 63/branch 1/subop/!= a/rs/a0 0/rs/x0 0/off13 +== code 0x80400000 + # load mhartid CSR into t0, trap all but first Hart + # 73/system 5/rd/t0 2/funct3/csrrs 0/rs/x0 f14/imm12/mhartid + # 63/branch 1/subop/!= 5/rs/t0 0/rs/x0 0/off13 main: + 6f/jal 1/rd/ra init/off21 + # print HELLO_WHATSURNAME 37/lui a/rd/a0 HELLO_WHATSURNAME/imm20hi 13/opi 0/subop/add a/rd/a0 a/rs/a0 HELLO_WHATSURNAME/imm12lo @@ -42,21 +45,65 @@ main: # infinite loop 6f/jal 0/rd/x0 0/off21 +init: +# initialize UART0 + # load 0x10010000 (UART0) into t0 + 37/lui 5/rd/t0 0x10000/imm20 + + # disable interrupts + 23/store 0/width/byte 5/rs/t0 0/rs/x0 1/off12 + + # enable DLAB + 13/opi 0/subop/add 6/rd/t1 0/rs/x0 80/imm12 + 23/store 0/width/byte 5/rs/t0 6/rs/t1 3/off12 + + # max speed = 38400bps + 13/opi 0/subop/add 6/rd/t1 0/rs/x0 3/imm12 + 23/store 0/width/byte 5/rs/t0 6/rs/t1 0/off12 + 23/store 0/width/byte 5/rs/t0 0/rs/x0 1/off12 + + # disable DLAB + 13/opi 0/subop/add 6/rd/t1 0/rs/x0 3/imm12 + 23/store 0/width/byte 5/rs/t0 6/rs/t1 3/off12 + + # enable fifo, clear, watermark=14b + 13/opi 0/subop/add 6/rd/t1 0/rs/x0 c7/imm12 + 23/store 0/width/byte 5/rs/t0 6/rs/t1 2/off12 + + # set dtr, srs, aux2 + 13/opi 0/subop/add 6/rd/t1 0/rs/x0 b/imm12 + 23/store 0/width/byte 5/rs/t0 6/rs/t1 4/off12 + + 13/opi 0/subop/add 6/rd/t1 0/rs/x0 1/imm12 + 23/store 0/width/byte 5/rs/t0 6/rs/t1 1/off12 + + # return + 67/jalr 0/subop 0/rd/x0 1/rs/ra 0/off12 + +old: + # load 3 into t1 + 13/opi 0/subop/add 6/rd/t1 0/rs/x0 3/imm12 + # set "data terminal ready" and "request to send" bits in MCR + 23/store 0/width/byte 5/rs/t0 6/rs/t1 4/off12 + # return + 67/jalr 0/subop 0/rd/x0 1/rs/ra 0/off12 + print: # print a C-string from a0 # load 0x10010000 (UART0) into t0 - 37/lui 5/rd/t0 0x10010/imm20 + 37/lui 5/rd/t0 0x10000/imm20 print:loop: - # load unsigned byte at x4 + # load unsigned byte at a0 03/load 4/subop/byte 6/rd/t1 a/rs/a0 0/imm12 # break loop if zero 63/branch 0/subop/== 6/rs/t1 0/rs/x0 print:break/off13 print:spin: - # spin if FIFO is full (t2 sign bit is set) - 03/load 2/subop/word 7/rd/t2 5/rs/t0 0/imm12 - 63/branch 4/subop/< 7/rs/t2 0/rs/x0 print:spin/off13 + # spin if FIFO is full (thr_empty = UART+5 & 0x20) + 03/load 4/subop/byte 7/rd/t2 5/rs/t0 5/imm12 + 13/opi 7/subop/and 7/rd/t2 7/rs/t2 20/imm12 + 63/branch 0/subop/== 7/rs/t2 0/rs/x0 print:spin/off13 # print char - 23/store 2/width/word 5/rs/t0 6/rs/t1 0/off12 + 23/store 0/width/byte 5/rs/t0 6/rs/t1 0/off12 # increment a0 13/opi 0/subop/add a/rd/a0 a/rs/a0 1/imm12 # jump back up @@ -67,20 +114,22 @@ print:break: read: # read a C-string into a0 - # load 0x10010004 (UART0+4) into t0 - 37/lui 5/rd/t0 0x10010/imm20 - 13/opi 0/subop/add 5/rd/t0 5/rs/t0 4/imm12 + # load 0x10000000 (UART0) into t0 + 37/lui 5/rd/t0 0x10000/imm20 # load 0x0a (\n) into t1 13/opi 0/subop/add 6/rd/t1 0/rs/x0 0a/imm12 + read:loop: - # load word at a0 into t0 - 03/load 2/subop/word 7/rd/t2 5/rs/t0 0/imm12 - # spin if FIFO is empty (t2 sign bit is set) - 63/branch 4/subop/< 7/rs/t2 0/rs/x0 read:loop/off13 + # spin if FIFO is empty (data_ready = UART+5 & 1) + 03/load 4/subop/byte 7/rd/t2 5/rs/t0 5/imm12 + 13/opi 7/subop/and 7/rd/t2 7/rs/t2 1/imm12 + 63/branch 0/subop/== 7/rs/t2 0/rs/x0 read:loop/off13 + # load unsigned byte into t2 + 03/load 4/subop/byte 7/rd/t2 5/rs/t0 0/imm12 # break loop if newline (t2 == t1) 63/branch 0/subop/== 7/rs/t2 6/rs/t1 read:break/off13 # store char at a0 - 23/store 2/width/word a/rs/a0 7/rs/t2 0/off12 + 23/store 0/width/byte a/rs/a0 7/rs/t2 0/off12 # increment a0 13/opi 0/subop/add a/rd/a0 a/rs/a0 1/imm12 # jump back up diff --git a/examples/hello_world.subv b/examples/hello_world.subv index 579a0e6..aa044ae 100644 --- a/examples/hello_world.subv +++ b/examples/hello_world.subv @@ -1,6 +1,6 @@ -== code 0x80000000 +== code 0x80400000 # trap all but first Hart (a0 = mhartid) - 63/branch 1/subop/!= a/rs/a0 0/rs/x0 0/off13 + # 63/branch 1/subop/!= a/rs/a0 0/rs/x0 0/off13 main: # a0 = &message @@ -12,20 +12,21 @@ main: 6f/jal 1/rd/ra print/off21 loop: # infinite loop - 6f/jal 0/rd/x0 loop/off21 + 6f/jal 0/rd/x0 main/off21 print: - # load 0x10010000 (UART0) into t0 - 37/lui 5/rd/t0 0x10010/imm20 + # load 0x10000000 (UART0) into t0 + 37/lui 5/rd/t0 0x10000/imm20 print:loop: # load unsigned byte at a0 03/load 4/subop/byte 6/rd/t1 a/rs/a0 0/imm12 # break loop if zero 63/branch 0/subop/== 6/rs/t1 0/rs/x0 print:break/off13 print:spin: - # spin if FIFO is full - 03/load 2/subop/word 7/rd/t2 5/rs/t0 0/imm12 - 63/branch 4/subop/< 7/rs/t2 0/rs/x0 print:spin/off13 + # spin if FIFO is full (thr_emtpy = UART+5 & 0x20) + 03/load 4/subop/byte 7/rd/t2 5/rs/t0 5/imm12 + 13/opi 7/subop/and 7/rd/t2 7/rs/t2 20/imm12 + 63/branch 0/subop/== 7/rs/t2 0/rs/x0 print:spin/off13 # print char 23/store 2/width/word 5/rs/t0 6/rs/t1 0/off12 # increment a0 diff --git a/qemu.sh b/qemu.sh index ef6616b..339c842 100755 --- a/qemu.sh +++ b/qemu.sh @@ -1,2 +1,2 @@ #!/bin/sh -exec qemu-system-riscv32 -nographic -machine sifive_u -bios none -kernel "$@" +exec qemu-system-riscv32 -M virt -nographic -kernel "$@" -- cgit v1.2.3