git.s-ol.nu ~forks/DiligentCore / 00219a5
Renamed Align to AlignUp assiduous 6 months ago
31 changed file(s) with 136 addition(s) and 130 deletion(s). Raw diff Collapse all Expand all
4343 }
4444
4545 template <typename T1, typename T2>
46 inline typename std::conditional<sizeof(T1) >= sizeof(T2), T1, T2>::type Align(T1 val, T2 alignment)
46 inline typename std::conditional<sizeof(T1) >= sizeof(T2), T1, T2>::type AlignUp(T1 val, T2 alignment)
4747 {
4848 static_assert(std::is_unsigned<T1>::value == std::is_unsigned<T2>::value, "both types must be signed or unsigned");
4949 static_assert(!std::is_pointer<T1>::value && !std::is_pointer<T2>::value, "types must not be pointers");
5454 }
5555
5656 template <typename PtrType, typename AlignType>
57 inline PtrType* Align(PtrType* val, AlignType alignment)
57 inline PtrType* AlignUp(PtrType* val, AlignType alignment)
5858 {
59 return reinterpret_cast<PtrType*>(Align(reinterpret_cast<uintptr_t>(val), static_cast<uintptr_t>(alignment)));
59 return reinterpret_cast<PtrType*>(AlignUp(reinterpret_cast<uintptr_t>(val), static_cast<uintptr_t>(alignment)));
6060 }
6161
6262 template <typename T1, typename T2>
8989
9090 for (auto& block : m_Blocks)
9191 {
92 auto* Ptr = Align(block.CurrPtr, align);
92 auto* Ptr = AlignUp(block.CurrPtr, align);
9393 if (Ptr + size <= block.Data + block.Size)
9494 {
9595 block.CurrPtr = Ptr + size;
104104 m_Blocks.emplace_back(m_pAllocator->Allocate(BlockSize, "dynamic linear allocator page", __FILE__, __LINE__), BlockSize);
105105
106106 auto& block = m_Blocks.back();
107 auto* Ptr = Align(block.Data, align);
107 auto* Ptr = AlignUp(block.Data, align);
108108 VERIFY(Ptr + size <= block.Data + block.Size, "Not enough space in the new block - this is a bug");
109109 block.CurrPtr = Ptr + size;
110110 return Ptr;
123123 }
124124 m_CurrAlignment = alignment;
125125
126 size = Align(size, alignment);
126 size = AlignUp(size, alignment);
127127 m_ReservedSize += size;
128128
129129 #if DILIGENT_DEBUG
162162 VERIFY(m_pDataStart == nullptr, "Memory has already been allocated");
163163 VERIFY(m_pAllocator != nullptr, "Allocator must not be null");
164164 // Make sure the data size is at least sizeof(void*)-aligned
165 m_ReservedSize = Align(m_ReservedSize, sizeof(void*));
165 m_ReservedSize = AlignUp(m_ReservedSize, sizeof(void*));
166166 if (m_ReservedSize > 0)
167167 {
168168 m_pDataStart = reinterpret_cast<uint8_t*>(m_pAllocator->Allocate(m_ReservedSize, "Raw memory for linear allocator", __FILE__, __LINE__));
169 VERIFY(m_pDataStart == Align(m_pDataStart, sizeof(void*)), "Memory pointer must be at least sizeof(void*)-aligned");
169 VERIFY(m_pDataStart == AlignUp(m_pDataStart, sizeof(void*)), "Memory pointer must be at least sizeof(void*)-aligned");
170170
171171 m_pCurrPtr = m_pDataStart;
172172 }
181181 if (size == 0)
182182 return nullptr;
183183
184 size = Align(size, alignment);
184 size = AlignUp(size, alignment);
185185
186186 #if DILIGENT_DEBUG
187187 VERIFY(m_DbgCurrAllocation < m_DbgAllocations.size(), "Allocation number exceed the number of allocations that were originally reserved.");
190190 VERIFY(CurrAllocation.alignment == alignment, "Allocation alignment (", alignment, ") does not match the initially requested alignment (", CurrAllocation.alignment, ")");
191191 #endif
192192
193 VERIFY(Align(m_pCurrPtr, m_CurrAlignment) == m_pCurrPtr, "Current pointer is not aligned as expected");
194 m_pCurrPtr = Align(m_pCurrPtr, alignment);
193 VERIFY(AlignUp(m_pCurrPtr, m_CurrAlignment) == m_pCurrPtr, "Current pointer is not aligned as expected");
194 m_pCurrPtr = AlignUp(m_pCurrPtr, alignment);
195195 m_CurrAlignment = alignment;
196196
197197 VERIFY(m_pCurrPtr + size <= m_pDataStart + CurrAllocation.reserved_size,
3434
3535 static size_t AdjustBlockSize(size_t BlockSize)
3636 {
37 return Align(std::max(BlockSize, size_t{1}), sizeof(void*));
37 return AlignUp(std::max(BlockSize, size_t{1}), sizeof(void*));
3838 }
3939
4040 FixedBlockMemoryAllocator::FixedBlockMemoryAllocator(IMemoryAllocator& RawMemoryAllocator,
115115 {
116116 VERIFY_EXPR(Size > 0);
117117 VERIFY(IsPowerOfTwo(Alignment), "Alignment (", Alignment, ") must be power of 2");
118 Size = Align(Size, Alignment);
118 Size = AlignUp(Size, Alignment);
119119
120120 if (m_UsedSize + Size > m_MaxSize)
121121 {
122122 return InvalidOffset;
123123 }
124124
125 auto AlignedHead = Align(m_Head, Alignment);
125 auto AlignedHead = AlignUp(m_Head, Alignment);
126126 if (m_Head >= m_Tail)
127127 {
128128 // AlignedHead
188188 {
189189 VERIFY_EXPR(Size > 0);
190190 VERIFY(IsPowerOfTwo(Alignment), "Alignment (", Alignment, ") must be power of 2");
191 Size = Align(Size, Alignment);
191 Size = AlignUp(Size, Alignment);
192192 if (m_FreeSize < Size)
193193 return Allocation::InvalidAllocation();
194194
213213 //
214214 auto Offset = SmallestBlockIt->first;
215215 VERIFY_EXPR(Offset % m_CurrAlignment == 0);
216 auto AlignedOffset = Align(Offset, Alignment);
216 auto AlignedOffset = AlignUp(Offset, Alignment);
217217 auto AdjustedSize = Size + (AlignedOffset - Offset);
218218 VERIFY_EXPR(AdjustedSize <= Size + AlignmentReserve);
219219 auto NewOffset = Offset + AdjustedSize;
13501350 VERIFY((FmtAttribs.BlockWidth & (FmtAttribs.BlockWidth - 1)) == 0, "Compressed block width is expected to be power of 2");
13511351 VERIFY((FmtAttribs.BlockHeight & (FmtAttribs.BlockHeight - 1)) == 0, "Compressed block height is expected to be power of 2");
13521352 // For block-compression formats, all parameters are still specified in texels rather than compressed texel blocks (18.4.1)
1353 MipProps.StorageWidth = Align(MipProps.LogicalWidth, Uint32{FmtAttribs.BlockWidth});
1354 MipProps.StorageHeight = Align(MipProps.LogicalHeight, Uint32{FmtAttribs.BlockHeight});
1353 MipProps.StorageWidth = AlignUp(MipProps.LogicalWidth, Uint32{FmtAttribs.BlockWidth});
1354 MipProps.StorageHeight = AlignUp(MipProps.LogicalHeight, Uint32{FmtAttribs.BlockHeight});
13551355 MipProps.RowSize = MipProps.StorageWidth / Uint32{FmtAttribs.BlockWidth} * Uint32{FmtAttribs.ComponentSize}; // ComponentSize is the block size
13561356 MipProps.DepthSliceSize = MipProps.StorageHeight / Uint32{FmtAttribs.BlockHeight} * MipProps.RowSize;
13571357 MipProps.MipSize = MipProps.DepthSliceSize * MipProps.Depth;
15741574 for (Uint32 mip = 0; mip < TexDesc.MipLevels; ++mip)
15751575 {
15761576 auto MipInfo = GetMipLevelProperties(TexDesc, mip);
1577 ArraySliceSize += Align(MipInfo.MipSize, Alignment);
1577 ArraySliceSize += AlignUp(MipInfo.MipSize, Alignment);
15781578 }
15791579
15801580 Offset = ArraySliceSize;
15881588 for (Uint32 mip = 0; mip < MipLevel; ++mip)
15891589 {
15901590 auto MipInfo = GetMipLevelProperties(TexDesc, mip);
1591 Offset += Align(MipInfo.MipSize, Alignment);
1591 Offset += AlignUp(MipInfo.MipSize, Alignment);
15921592 }
15931593
15941594 if (ArraySlice == TexDesc.ArraySize)
16401640 // Align update region size by the block size
16411641 VERIFY_EXPR(IsPowerOfTwo(FmtAttribs.BlockWidth));
16421642 VERIFY_EXPR(IsPowerOfTwo(FmtAttribs.BlockHeight));
1643 const auto BlockAlignedRegionWidth = Align(UpdateRegionWidth, Uint32{FmtAttribs.BlockWidth});
1644 const auto BlockAlignedRegionHeight = Align(UpdateRegionHeight, Uint32{FmtAttribs.BlockHeight});
1643 const auto BlockAlignedRegionWidth = AlignUp(UpdateRegionWidth, Uint32{FmtAttribs.BlockWidth});
1644 const auto BlockAlignedRegionHeight = AlignUp(UpdateRegionHeight, Uint32{FmtAttribs.BlockHeight});
16451645
16461646 CopyInfo.RowSize = BlockAlignedRegionWidth / Uint32{FmtAttribs.BlockWidth} * Uint32{FmtAttribs.ComponentSize};
16471647 CopyInfo.RowCount = BlockAlignedRegionHeight / FmtAttribs.BlockHeight;
16531653 }
16541654
16551655 VERIFY_EXPR(IsPowerOfTwo(RowStrideAlignment));
1656 CopyInfo.RowStride = Align(CopyInfo.RowSize, RowStrideAlignment);
1656 CopyInfo.RowStride = AlignUp(CopyInfo.RowSize, RowStrideAlignment);
16571657 if (FmtAttribs.ComponentType == COMPONENT_TYPE_COMPRESSED)
16581658 {
16591659 CopyInfo.RowStrideInTexels = CopyInfo.RowStride / Uint32{FmtAttribs.ComponentSize} * Uint32{FmtAttribs.BlockWidth};
442442 const auto ShaderGroupBaseAlignment = this->m_pDevice->GetProperties().ShaderGroupBaseAlignment;
443443
444444 const auto AlignToLarger = [ShaderGroupBaseAlignment](size_t offset) -> Uint32 {
445 return Align(static_cast<Uint32>(offset), ShaderGroupBaseAlignment);
445 return AlignUp(static_cast<Uint32>(offset), ShaderGroupBaseAlignment);
446446 };
447447
448448 const Uint32 RayGenOffset = 0;
2929 /// \file
3030 /// Declaration of Diligent::BufferD3D11Impl class
3131
32 #include "EngineD3D11ImplTraits.hpp"
3233 #include "BufferD3D11.h"
33 #include "RenderDeviceD3D11.h"
3434 #include "BufferBase.hpp"
35 #include "BufferViewD3D11Impl.hpp"
36 #include "RenderDeviceD3D11Impl.hpp"
3735
3836 namespace Diligent
3937 {
38
39 class RenderDeviceD3D11Impl;
4040
4141 /// Buffer object implementation in Direct3D11 backend.
4242 class BufferD3D11Impl final : public BufferBase<EngineD3D11ImplTraits>
4444 public:
4545 using TBufferBase = BufferBase<EngineD3D11ImplTraits>;
4646
47 BufferD3D11Impl(IReferenceCounters* pRefCounters,
48 FixedBlockMemoryAllocator& BuffViewObjMemAllocator,
49 class RenderDeviceD3D11Impl* pDeviceD3D11,
50 const BufferDesc& BuffDesc,
51 const BufferData* pBuffData = nullptr);
47 BufferD3D11Impl(IReferenceCounters* pRefCounters,
48 FixedBlockMemoryAllocator& BuffViewObjMemAllocator,
49 RenderDeviceD3D11Impl* pDeviceD3D11,
50 const BufferDesc& BuffDesc,
51 const BufferData* pBuffData = nullptr);
5252
53 BufferD3D11Impl(IReferenceCounters* pRefCounters,
54 FixedBlockMemoryAllocator& BuffViewObjMemAllocator,
55 class RenderDeviceD3D11Impl* pDeviceD3D11,
56 const BufferDesc& BuffDesc,
57 RESOURCE_STATE InitialState,
58 ID3D11Buffer* pd3d11Buffer);
53 BufferD3D11Impl(IReferenceCounters* pRefCounters,
54 FixedBlockMemoryAllocator& BuffViewObjMemAllocator,
55 RenderDeviceD3D11Impl* pDeviceD3D11,
56 const BufferDesc& BuffDesc,
57 RESOURCE_STATE InitialState,
58 ID3D11Buffer* pd3d11Buffer);
5959
6060 ~BufferD3D11Impl();
6161
3333 #include "ShaderResourceCacheCommon.hpp"
3434 #include "TextureBaseD3D11.hpp"
3535 #include "BufferD3D11Impl.hpp"
36 #include "BufferViewD3D11Impl.hpp"
3637 #include "SamplerD3D11Impl.hpp"
3738 #include "PipelineResourceAttribsD3D11.hpp"
3839
2525 */
2626
2727 #include "pch.h"
28
29 #include "BufferD3D11Impl.hpp"
30
2831 #include <atlbase.h>
2932
30 #include "BufferD3D11Impl.hpp"
3133 #include "RenderDeviceD3D11Impl.hpp"
3234 #include "DeviceContextD3D11Impl.hpp"
35 #include "BufferViewD3D11Impl.hpp"
36
3337 #include "D3D11TypeConversions.hpp"
34 #include "BufferViewD3D11Impl.hpp"
3538 #include "GraphicsAccessories.hpp"
3639 #include "EngineMemory.h"
40 #include "Align.hpp"
3741
3842 namespace Diligent
3943 {
6670
6771 if (m_Desc.BindFlags & BIND_UNIFORM_BUFFER)
6872 {
69 Uint32 AlignmentMask = 15;
70 m_Desc.uiSizeInBytes = (m_Desc.uiSizeInBytes + AlignmentMask) & (~AlignmentMask);
73 static constexpr Uint32 Alignment = 16;
74 m_Desc.uiSizeInBytes = AlignUp(m_Desc.uiSizeInBytes, Alignment);
7175 }
7276
7377 D3D11_BUFFER_DESC D3D11BuffDesc;
2727 #include "pch.h"
2828
2929 #include "ShaderResourceCacheD3D11.hpp"
30
3031 #include "TextureBaseD3D11.hpp"
3132 #include "BufferD3D11Impl.hpp"
3233 #include "SamplerD3D11Impl.hpp"
4445 auto SamplerCount = ResCount[DESCRIPTOR_RANGE_SAMPLER];
4546 auto UAVCount = ResCount[DESCRIPTOR_RANGE_UAV];
4647 size_t MemSize = 0;
47 MemSize = Align(MemSize + (sizeof(CachedCB) + sizeof(BindPointsD3D11) + sizeof(ID3D11Buffer*)) * CBCount, MaxAlignment);
48 MemSize = Align(MemSize + (sizeof(CachedResource) + sizeof(BindPointsD3D11) + sizeof(ID3D11ShaderResourceView*)) * SRVCount, MaxAlignment);
49 MemSize = Align(MemSize + (sizeof(CachedSampler) + sizeof(BindPointsD3D11) + sizeof(ID3D11SamplerState*)) * SamplerCount, MaxAlignment);
50 MemSize = Align(MemSize + (sizeof(CachedResource) + sizeof(BindPointsD3D11) + sizeof(ID3D11UnorderedAccessView*)) * UAVCount, MaxAlignment);
48 MemSize = AlignUp(MemSize + (sizeof(CachedCB) + sizeof(BindPointsD3D11) + sizeof(ID3D11Buffer*)) * CBCount, MaxAlignment);
49 MemSize = AlignUp(MemSize + (sizeof(CachedResource) + sizeof(BindPointsD3D11) + sizeof(ID3D11ShaderResourceView*)) * SRVCount, MaxAlignment);
50 MemSize = AlignUp(MemSize + (sizeof(CachedSampler) + sizeof(BindPointsD3D11) + sizeof(ID3D11SamplerState*)) * SamplerCount, MaxAlignment);
51 MemSize = AlignUp(MemSize + (sizeof(CachedResource) + sizeof(BindPointsD3D11) + sizeof(ID3D11UnorderedAccessView*)) * UAVCount, MaxAlignment);
5152 // clang-format on
5253 VERIFY(MemSize < InvalidResourceOffset, "Memory size exeed the maximum allowed size.");
5354 return MemSize;
7980 VERIFY(UAVCount == m_UAVCount, "UAVs count (", UAVCount, ") exceeds maximum representable value");
8081
8182 // m_CBOffset = 0
82 m_SRVOffset = static_cast<OffsetType>(Align(m_CBOffset + (sizeof(CachedCB) + sizeof(BindPointsD3D11) + sizeof(ID3D11Buffer*)) * CBCount, MaxAlignment));
83 m_SamplerOffset = static_cast<OffsetType>(Align(m_SRVOffset + (sizeof(CachedResource) + sizeof(BindPointsD3D11) + sizeof(ID3D11ShaderResourceView*)) * SRVCount, MaxAlignment));
84 m_UAVOffset = static_cast<OffsetType>(Align(m_SamplerOffset + (sizeof(CachedSampler) + sizeof(BindPointsD3D11) + sizeof(ID3D11SamplerState*)) * SamplerCount, MaxAlignment));
85 size_t BufferSize = static_cast<OffsetType>(Align(m_UAVOffset + (sizeof(CachedResource) + sizeof(BindPointsD3D11) + sizeof(ID3D11UnorderedAccessView*)) * UAVCount, MaxAlignment));
83 m_SRVOffset = static_cast<OffsetType>(AlignUp(m_CBOffset + (sizeof(CachedCB) + sizeof(BindPointsD3D11) + sizeof(ID3D11Buffer*)) * CBCount, MaxAlignment));
84 m_SamplerOffset = static_cast<OffsetType>(AlignUp(m_SRVOffset + (sizeof(CachedResource) + sizeof(BindPointsD3D11) + sizeof(ID3D11ShaderResourceView*)) * SRVCount, MaxAlignment));
85 m_UAVOffset = static_cast<OffsetType>(AlignUp(m_SamplerOffset + (sizeof(CachedSampler) + sizeof(BindPointsD3D11) + sizeof(ID3D11SamplerState*)) * SamplerCount, MaxAlignment));
86 size_t BufferSize = static_cast<OffsetType>(AlignUp(m_UAVOffset + (sizeof(CachedResource) + sizeof(BindPointsD3D11) + sizeof(ID3D11UnorderedAccessView*)) * UAVCount, MaxAlignment));
8687 // clang-format on
8788
8889 VERIFY_EXPR(m_pResourceData == nullptr);
196196 VERIFY_EXPR(Alignment > 0);
197197 VERIFY(IsPowerOfTwo(Alignment), "Alignment (", Alignment, ") must be power of 2");
198198
199 if (m_CurrOffset == InvalidOffset || SizeInBytes + (Align(m_CurrOffset, Alignment) - m_CurrOffset) > m_AvailableSize)
199 if (m_CurrOffset == InvalidOffset || SizeInBytes + (AlignUp(m_CurrOffset, Alignment) - m_CurrOffset) > m_AvailableSize)
200200 {
201201 auto NewPageSize = m_PageSize;
202202 while (NewPageSize < SizeInBytes)
215215 }
216216 }
217217
218 if (m_CurrOffset != InvalidOffset && SizeInBytes + (Align(m_CurrOffset, Alignment) - m_CurrOffset) <= m_AvailableSize)
219 {
220 auto AlignedOffset = Align(m_CurrOffset, Alignment);
218 if (m_CurrOffset != InvalidOffset && SizeInBytes + (AlignUp(m_CurrOffset, Alignment) - m_CurrOffset) <= m_AvailableSize)
219 {
220 auto AlignedOffset = AlignUp(m_CurrOffset, Alignment);
221221 auto AdjustedSize = SizeInBytes + (AlignedOffset - m_CurrOffset);
222222 VERIFY_EXPR(AdjustedSize <= m_AvailableSize);
223223 m_AvailableSize -= AdjustedSize;
9292
9393 // AlignedDestinationBufferOffset must be a multiple of 8 bytes.
9494 // https://microsoft.github.io/DirectX-Specs/d3d/CountersAndQueries.html#resolvequerydata
95 Uint32 AlignedQueryDataSize = Align(GetQueryDataSize(static_cast<QUERY_TYPE>(QueryType)), Uint32{8});
95 Uint32 AlignedQueryDataSize = AlignUp(GetQueryDataSize(static_cast<QUERY_TYPE>(QueryType)), Uint32{8});
9696 HeapInfo.AvailableQueries.resize(HeapInfo.HeapSize);
9797 HeapInfo.ResolveBufferOffsets.resize(HeapInfo.HeapSize);
9898 for (Uint32 i = 0; i < HeapInfo.HeapSize; ++i)
8484 m_AccelStructsOffset = AdvanceOffset(ResCounters.NumAccelStructs);
8585 m_TotalResources = AdvanceOffset(0);
8686
87 auto AlignedResourceNamesPoolSize = Align(ResourceNamesPoolSize, sizeof(void*));
87 auto AlignedResourceNamesPoolSize = AlignUp(ResourceNamesPoolSize, sizeof(void*));
8888 auto MemorySize = m_TotalResources * sizeof(D3DShaderResourceAttribs) + AlignedResourceNamesPoolSize * sizeof(char);
8989
9090 VERIFY_EXPR(GetNumCBs() == ResCounters.NumCBs);
103103 StringPoolDataSize += strlen(sb.Name) + 1;
104104 }
105105
106 auto AlignedStringPoolDataSize = Align(StringPoolDataSize, sizeof(void*));
106 auto AlignedStringPoolDataSize = AlignUp(StringPoolDataSize, sizeof(void*));
107107
108108 // clang-format off
109109 size_t TotalMemorySize =
148148 VERIFY(IsPowerOfTwo(MemReqs.alignment), "Alignment is not power of 2!");
149149 m_MemoryAllocation = pRenderDeviceVk->AllocateMemory(MemReqs.size, MemReqs.alignment, MemoryTypeIndex, VK_MEMORY_ALLOCATE_DEVICE_ADDRESS_BIT);
150150
151 m_MemoryAlignedOffset = Align(VkDeviceSize{m_MemoryAllocation.UnalignedOffset}, MemReqs.alignment);
151 m_MemoryAlignedOffset = AlignUp(VkDeviceSize{m_MemoryAllocation.UnalignedOffset}, MemReqs.alignment);
152152 VERIFY(m_MemoryAllocation.Size >= MemReqs.size + (m_MemoryAlignedOffset - m_MemoryAllocation.UnalignedOffset), "Size of memory allocation is too small");
153153 auto Memory = m_MemoryAllocation.Page->GetVkMemory();
154154 auto err = LogicalDevice.BindBufferMemory(m_VulkanBuffer, Memory, m_MemoryAlignedOffset);
260260 VERIFY(IsPowerOfTwo(MemReqs.alignment), "Alignment is not power of 2!");
261261 m_MemoryAllocation = pRenderDeviceVk->AllocateMemory(MemReqs.size, MemReqs.alignment, MemoryTypeIndex, AllocateFlags);
262262
263 m_BufferMemoryAlignedOffset = Align(VkDeviceSize{m_MemoryAllocation.UnalignedOffset}, MemReqs.alignment);
263 m_BufferMemoryAlignedOffset = AlignUp(VkDeviceSize{m_MemoryAllocation.UnalignedOffset}, MemReqs.alignment);
264264 VERIFY(m_MemoryAllocation.Size >= MemReqs.size + (m_BufferMemoryAlignedOffset - m_MemoryAllocation.UnalignedOffset), "Size of memory allocation is too small");
265265 auto Memory = m_MemoryAllocation.Page->GetVkMemory();
266266 auto err = LogicalDevice.BindBufferMemory(m_VulkanBuffer, Memory, m_BufferMemoryAlignedOffset);
311311 // to the host (10.2)
312312 auto StagingMemoryAllocation = pRenderDeviceVk->AllocateMemory(StagingBufferMemReqs, VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT | VK_MEMORY_PROPERTY_HOST_COHERENT_BIT);
313313 auto StagingBufferMemory = StagingMemoryAllocation.Page->GetVkMemory();
314 auto AlignedStagingMemOffset = Align(VkDeviceSize{StagingMemoryAllocation.UnalignedOffset}, StagingBufferMemReqs.alignment);
314 auto AlignedStagingMemOffset = AlignUp(VkDeviceSize{StagingMemoryAllocation.UnalignedOffset}, StagingBufferMemReqs.alignment);
315315 VERIFY_EXPR(StagingMemoryAllocation.Size >= StagingBufferMemReqs.size + (AlignedStagingMemOffset - StagingMemoryAllocation.UnalignedOffset));
316316
317317 auto* StagingData = reinterpret_cast<uint8_t*>(StagingMemoryAllocation.Page->GetCPUMemory());
23322332 // Reaback memory is not created with HOST_COHERENT flag, so we have to explicitly invalidate the mapped range
23332333 // to make device writes visible to CPU reads
23342334 VERIFY_EXPR(pMapRegion->MaxZ >= 1 && pMapRegion->MaxY >= 1);
2335 auto BlockAlignedMaxX = Align(pMapRegion->MaxX, Uint32{FmtAttribs.BlockWidth});
2336 auto BlockAlignedMaxY = Align(pMapRegion->MaxY, Uint32{FmtAttribs.BlockHeight});
2335 auto BlockAlignedMaxX = AlignUp(pMapRegion->MaxX, Uint32{FmtAttribs.BlockWidth});
2336 auto BlockAlignedMaxY = AlignUp(pMapRegion->MaxY, Uint32{FmtAttribs.BlockHeight});
23372337 auto MapEndOffset = SubresourceOffset +
23382338 ((pMapRegion->MaxZ - 1) * MipLevelAttribs.StorageHeight + (BlockAlignedMaxY - FmtAttribs.BlockHeight)) / FmtAttribs.BlockHeight * MipLevelAttribs.RowSize +
23392339 (BlockAlignedMaxX / FmtAttribs.BlockWidth) * FmtAttribs.GetElementSize();
189189
190190 VERIFY(IsPowerOfTwo(MemReqs.alignment), "Alignment is not power of 2!");
191191 m_MemoryAllocation = pRenderDeviceVk->AllocateMemory(MemReqs, ImageMemoryFlags);
192 auto AlignedOffset = Align(m_MemoryAllocation.UnalignedOffset, MemReqs.alignment);
192 auto AlignedOffset = AlignUp(m_MemoryAllocation.UnalignedOffset, MemReqs.alignment);
193193 VERIFY_EXPR(m_MemoryAllocation.Size >= MemReqs.size + (AlignedOffset - m_MemoryAllocation.UnalignedOffset));
194194 auto Memory = m_MemoryAllocation.Page->GetVkMemory();
195195 auto err = LogicalDevice.BindImageMemory(m_VulkanImage, Memory, AlignedOffset);
303303 // to the host (10.2)
304304 auto StagingMemoryAllocation = pRenderDeviceVk->AllocateMemory(StagingBufferMemReqs, VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT | VK_MEMORY_PROPERTY_HOST_COHERENT_BIT);
305305 auto StagingBufferMemory = StagingMemoryAllocation.Page->GetVkMemory();
306 auto AlignedStagingMemOffset = Align(StagingMemoryAllocation.UnalignedOffset, StagingBufferMemReqs.alignment);
306 auto AlignedStagingMemOffset = AlignUp(StagingMemoryAllocation.UnalignedOffset, StagingBufferMemReqs.alignment);
307307 VERIFY_EXPR(StagingMemoryAllocation.Size >= StagingBufferMemReqs.size + (AlignedStagingMemOffset - StagingMemoryAllocation.UnalignedOffset));
308308
309309 auto* StagingData = reinterpret_cast<uint8_t*>(StagingMemoryAllocation.Page->GetCPUMemory());
425425 // which requires the ranges to be aligned by nonCoherentAtomSize.
426426 const auto& DeviceLimits = pRenderDeviceVk->GetPhysicalDevice().GetProperties().limits;
427427 // Align the buffer size to ensure that any aligned range is always in bounds.
428 VkStagingBuffCI.size = Align(VkStagingBuffCI.size, DeviceLimits.nonCoherentAtomSize);
428 VkStagingBuffCI.size = AlignUp(VkStagingBuffCI.size, DeviceLimits.nonCoherentAtomSize);
429429 }
430430 else if (m_Desc.CPUAccessFlags & CPU_ACCESS_WRITE)
431431 {
453453
454454 m_MemoryAllocation = pRenderDeviceVk->AllocateMemory(StagingBufferMemReqs, MemProperties);
455455 auto StagingBufferMemory = m_MemoryAllocation.Page->GetVkMemory();
456 auto AlignedStagingMemOffset = Align(m_MemoryAllocation.UnalignedOffset, StagingBufferMemReqs.alignment);
456 auto AlignedStagingMemOffset = AlignUp(m_MemoryAllocation.UnalignedOffset, StagingBufferMemReqs.alignment);
457457 VERIFY_EXPR(m_MemoryAllocation.Size >= StagingBufferMemReqs.size + (AlignedStagingMemOffset - m_MemoryAllocation.UnalignedOffset));
458458
459459 auto err = LogicalDevice.BindBufferMemory(m_StagingBuffer, StagingBufferMemory, AlignedStagingMemOffset);
786786 Offset += m_StagingDataAlignedOffset;
787787 auto AlignedOffset = AlignDown(Offset, PhysDeviceLimits.nonCoherentAtomSize);
788788 Size += Offset - AlignedOffset;
789 auto AlignedSize = Align(Size, PhysDeviceLimits.nonCoherentAtomSize);
789 auto AlignedSize = AlignUp(Size, PhysDeviceLimits.nonCoherentAtomSize);
790790
791791 InvalidateRange.offset = AlignedOffset;
792792 InvalidateRange.size = AlignedSize;
8989 VERIFY(IsPowerOfTwo(MemReqs.alignment), "Alignment is not power of 2!");
9090 m_MemoryAllocation = pRenderDeviceVk->AllocateMemory(MemReqs.size, MemReqs.alignment, MemoryTypeIndex, VK_MEMORY_ALLOCATE_DEVICE_ADDRESS_BIT);
9191
92 m_MemoryAlignedOffset = Align(VkDeviceSize{m_MemoryAllocation.UnalignedOffset}, MemReqs.alignment);
92 m_MemoryAlignedOffset = AlignUp(VkDeviceSize{m_MemoryAllocation.UnalignedOffset}, MemReqs.alignment);
9393 VERIFY(m_MemoryAllocation.Size >= MemReqs.size + (m_MemoryAlignedOffset - m_MemoryAllocation.UnalignedOffset), "Size of memory allocation is too small");
9494 auto Memory = m_MemoryAllocation.Page->GetVkMemory();
9595 auto err = LogicalDevice.BindBufferMemory(m_VulkanBuffer, Memory, m_MemoryAlignedOffset);
233233 auto MasterBlock = m_GlobalDynamicMemMgr.AllocateMasterBlock(SizeInBytes, Alignment);
234234 if (MasterBlock.IsValid())
235235 {
236 AlignedOffset = Align(MasterBlock.UnalignedOffset, size_t{Alignment});
236 AlignedOffset = AlignUp(MasterBlock.UnalignedOffset, size_t{Alignment});
237237 AlignedSize = MasterBlock.Size;
238238 VERIFY_EXPR(MasterBlock.Size >= SizeInBytes + (AlignedOffset - MasterBlock.UnalignedOffset));
239239 m_CurrAllocatedSize += static_cast<Uint32>(MasterBlock.Size);
242242 }
243243 else
244244 {
245 if (m_CurrOffset == InvalidOffset || SizeInBytes + (Align(m_CurrOffset, size_t{Alignment}) - m_CurrOffset) > m_AvailableSize)
245 if (m_CurrOffset == InvalidOffset || SizeInBytes + (AlignUp(m_CurrOffset, size_t{Alignment}) - m_CurrOffset) > m_AvailableSize)
246246 {
247247 auto MasterBlock = m_GlobalDynamicMemMgr.AllocateMasterBlock(m_MasterBlockSize, 0);
248248 if (MasterBlock.IsValid())
256256
257257 if (m_CurrOffset != InvalidOffset)
258258 {
259 AlignedOffset = Align(m_CurrOffset, size_t{Alignment});
259 AlignedOffset = AlignUp(m_CurrOffset, size_t{Alignment});
260260 AlignedSize = SizeInBytes + (AlignedOffset - m_CurrOffset);
261261 if (AlignedSize <= m_AvailableSize)
262262 {
108108 }
109109 else
110110 {
111 auto AlignmentOffset = Align(m_CurrPage.CurrOffset, Alignment) - m_CurrPage.CurrOffset;
111 auto AlignmentOffset = AlignUp(m_CurrPage.CurrOffset, Alignment) - m_CurrPage.CurrOffset;
112112 if (m_CurrPage.AvailableSize < SizeInBytes + AlignmentOffset)
113113 {
114114 // Allocate new page
106106 {
107107 // Offset may not necessarily be aligned, but the allocation is guaranteed to be large enough
108108 // to accomodate requested alignment
109 VERIFY_EXPR(Diligent::Align(VkDeviceSize{Allocation.UnalignedOffset}, alignment) - Allocation.UnalignedOffset + size <= Allocation.Size);
109 VERIFY_EXPR(Diligent::AlignUp(VkDeviceSize{Allocation.UnalignedOffset}, alignment) - Allocation.UnalignedOffset + size <= Allocation.Size);
110110 return VulkanMemoryAllocation{this, Allocation.UnalignedOffset, Allocation.Size};
111111 }
112112 else
200200
201201 if (Allocation.Page != nullptr)
202202 {
203 VERIFY_EXPR(Size + Diligent::Align(Allocation.UnalignedOffset, Alignment) - Allocation.UnalignedOffset <= Allocation.Size);
203 VERIFY_EXPR(Size + Diligent::AlignUp(Allocation.UnalignedOffset, Alignment) - Allocation.UnalignedOffset <= Allocation.Size);
204204 }
205205
206206 m_CurrUsedSize[stat_ind].fetch_add(Allocation.Size);
175175 while (!Subregion.IsValid())
176176 {
177177 auto ExtraSize = m_ExpansionSize != 0 ?
178 std::max(m_ExpansionSize, Align(Size, Alignment)) :
178 std::max(m_ExpansionSize, AlignUp(Size, Alignment)) :
179179 m_Mgr.GetMaxSize();
180180
181181 m_Mgr.Extend(ExtraSize);
188188 NEW_RC_OBJ(m_SuballocationsAllocator, "BufferSuballocationImpl instance", BufferSuballocationImpl)
189189 (
190190 this,
191 Align(static_cast<Uint32>(Subregion.UnalignedOffset), Alignment),
191 AlignUp(static_cast<Uint32>(Subregion.UnalignedOffset), Alignment),
192192 Size,
193193 std::move(Subregion)
194194 )
6565 {
6666 auto MipProps = GetMipLevelProperties(TexDesc, Mip);
6767 // Stride must be 32-bit aligned in OpenGL
68 auto RowStride = Align(MipProps.RowSize, Uint32{4});
68 auto RowStride = AlignUp(MipProps.RowSize, Uint32{4});
6969 m_SubresourceStrides[SubRes] = RowStride;
7070
7171 auto MipSize = MipProps.StorageHeight * RowStride;
596596 VERIFY(NumShaderStageInputs <= MaxOffset, "Max offset exceeded");
597597 m_NumShaderStageInputs = static_cast<OffsetType>(NumShaderStageInputs);
598598
599 auto AlignedResourceNamesPoolSize = Align(ResourceNamesPoolSize, sizeof(void*));
599 auto AlignedResourceNamesPoolSize = AlignUp(ResourceNamesPoolSize, sizeof(void*));
600600
601601 static_assert(sizeof(SPIRVShaderResourceAttribs) % sizeof(void*) == 0, "Size of SPIRVShaderResourceAttribs struct must be multiple of sizeof(void*)");
602602 // clang-format off
461461 const UINT64 RecordSize = D3D12_SHADER_IDENTIFIER_SIZE_IN_BYTES + ShaderRecordSize;
462462 const UINT64 align = D3D12_RAYTRACING_SHADER_TABLE_BYTE_ALIGNMENT;
463463
464 BuffDesc.Width = Align(RecordSize, align);
465 BuffDesc.Width = Align(BuffDesc.Width + NumMissShaders * RecordSize, align);
466 BuffDesc.Width = Align(BuffDesc.Width + NumHitShaders * RecordSize, align);
464 BuffDesc.Width = AlignUp(RecordSize, align);
465 BuffDesc.Width = AlignUp(BuffDesc.Width + NumMissShaders * RecordSize, align);
466 BuffDesc.Width = AlignUp(BuffDesc.Width + NumHitShaders * RecordSize, align);
467467
468468 hr = Ctx.pDevice->CreateCommittedResource(&HeapProps, D3D12_HEAP_FLAG_NONE,
469469 &BuffDesc, D3D12_RESOURCE_STATE_COPY_DEST, nullptr,
665665 const UINT64 handleSize = D3D12_SHADER_IDENTIFIER_SIZE_IN_BYTES;
666666 const UINT64 align = D3D12_RAYTRACING_SHADER_TABLE_BYTE_ALIGNMENT;
667667 const UINT64 RayGenOffset = 0;
668 const UINT64 RayMissOffset = Align(RayGenOffset + handleSize, align);
669 const UINT64 HitGroupOffset = Align(RayMissOffset + handleSize, align);
668 const UINT64 RayMissOffset = AlignUp(RayGenOffset + handleSize, align);
669 const UINT64 HitGroupOffset = AlignUp(RayMissOffset + handleSize, align);
670670
671671 Desc.RayGenerationShaderRecord.StartAddress = Ctx.pSBTBuffer->GetGPUVirtualAddress() + RayGenOffset;
672672 Desc.RayGenerationShaderRecord.SizeInBytes = handleSize;
801801 const UINT64 handleSize = D3D12_SHADER_IDENTIFIER_SIZE_IN_BYTES;
802802 const UINT64 align = D3D12_RAYTRACING_SHADER_TABLE_BYTE_ALIGNMENT;
803803 const UINT64 RayGenOffset = 0;
804 const UINT64 RayMissOffset = Align(RayGenOffset + handleSize, align);
805 const UINT64 HitGroupOffset = Align(RayMissOffset + handleSize, align);
804 const UINT64 RayMissOffset = AlignUp(RayGenOffset + handleSize, align);
805 const UINT64 HitGroupOffset = AlignUp(RayMissOffset + handleSize, align);
806806
807807 Desc.RayGenerationShaderRecord.StartAddress = Ctx.pSBTBuffer->GetGPUVirtualAddress() + RayGenOffset;
808808 Desc.RayGenerationShaderRecord.SizeInBytes = handleSize;
933933 const UINT64 handleSize = D3D12_SHADER_IDENTIFIER_SIZE_IN_BYTES;
934934 const UINT64 align = D3D12_RAYTRACING_SHADER_TABLE_BYTE_ALIGNMENT;
935935 const UINT64 RayGenOffset = 0;
936 const UINT64 RayMissOffset = Align(RayGenOffset + handleSize, align);
937 const UINT64 HitGroupOffset = Align(RayMissOffset + handleSize, align);
936 const UINT64 RayMissOffset = AlignUp(RayGenOffset + handleSize, align);
937 const UINT64 HitGroupOffset = AlignUp(RayMissOffset + handleSize, align);
938938
939939 Desc.RayGenerationShaderRecord.StartAddress = Ctx.pSBTBuffer->GetGPUVirtualAddress() + RayGenOffset;
940940 Desc.RayGenerationShaderRecord.SizeInBytes = handleSize;
12361236 const UINT64 align = D3D12_RAYTRACING_SHADER_TABLE_BYTE_ALIGNMENT;
12371237 const UINT64 ShaderRecordSize = handleSize + TestingConstants::MultiGeometry::ShaderRecordSize;
12381238 const UINT64 RayGenOffset = 0;
1239 const UINT64 RayMissOffset = Align(RayGenOffset + handleSize, align);
1240 const UINT64 HitGroupOffset = Align(RayMissOffset + handleSize, align);
1239 const UINT64 RayMissOffset = AlignUp(RayGenOffset + handleSize, align);
1240 const UINT64 HitGroupOffset = AlignUp(RayMissOffset + handleSize, align);
12411241 const auto& Weights = TestingConstants::MultiGeometry::Weights;
12421242
12431243 Desc.RayGenerationShaderRecord.StartAddress = Ctx.pSBTBuffer->GetGPUVirtualAddress() + RayGenOffset;
537537 MemInfo.buffer = Ctx.vkVertexBuffer;
538538 vkGetBufferMemoryRequirements2(Ctx.vkDevice, &MemInfo, &MemReqs);
539539
540 MemSize = Align(MemSize, MemReqs.memoryRequirements.alignment);
540 MemSize = AlignUp(MemSize, MemReqs.memoryRequirements.alignment);
541541 MemSize += MemReqs.memoryRequirements.size;
542542 MemTypeBits |= MemReqs.memoryRequirements.memoryTypeBits;
543543
544544 BindMem.emplace_back([&Ctx, MemReqs, &BufferInfo](VkDeviceMemory Mem, VkDeviceSize& Offset) {
545 Offset = Align(Offset, MemReqs.memoryRequirements.alignment);
545 Offset = AlignUp(Offset, MemReqs.memoryRequirements.alignment);
546546 vkBindBufferMemory(Ctx.vkDevice, Ctx.vkVertexBuffer, Mem, Offset);
547547 Offset += MemReqs.memoryRequirements.size;
548548 BufferInfo.buffer = Ctx.vkVertexBuffer;
561561 MemInfo.buffer = Ctx.vkIndexBuffer;
562562 vkGetBufferMemoryRequirements2(Ctx.vkDevice, &MemInfo, &MemReqs);
563563
564 MemSize = Align(MemSize, MemReqs.memoryRequirements.alignment);
564 MemSize = AlignUp(MemSize, MemReqs.memoryRequirements.alignment);
565565 MemSize += MemReqs.memoryRequirements.size;
566566 MemTypeBits |= MemReqs.memoryRequirements.memoryTypeBits;
567567
568568 BindMem.emplace_back([&Ctx, MemReqs, &BufferInfo](VkDeviceMemory Mem, VkDeviceSize& Offset) {
569 Offset = Align(Offset, MemReqs.memoryRequirements.alignment);
569 Offset = AlignUp(Offset, MemReqs.memoryRequirements.alignment);
570570 vkBindBufferMemory(Ctx.vkDevice, Ctx.vkIndexBuffer, Mem, Offset);
571571 Offset += MemReqs.memoryRequirements.size;
572572 BufferInfo.buffer = Ctx.vkIndexBuffer;
585585 MemInfo.buffer = Ctx.vkInstanceBuffer;
586586 vkGetBufferMemoryRequirements2(Ctx.vkDevice, &MemInfo, &MemReqs);
587587
588 MemSize = Align(MemSize, MemReqs.memoryRequirements.alignment);
588 MemSize = AlignUp(MemSize, MemReqs.memoryRequirements.alignment);
589589 MemSize += MemReqs.memoryRequirements.size;
590590 MemTypeBits |= MemReqs.memoryRequirements.memoryTypeBits;
591591
592592 BindMem.emplace_back([&Ctx, MemReqs, &BufferInfo](VkDeviceMemory Mem, VkDeviceSize& Offset) {
593 Offset = Align(Offset, MemReqs.memoryRequirements.alignment);
593 Offset = AlignUp(Offset, MemReqs.memoryRequirements.alignment);
594594 vkBindBufferMemory(Ctx.vkDevice, Ctx.vkInstanceBuffer, Mem, Offset);
595595 Offset += MemReqs.memoryRequirements.size;
596596 BufferInfo.buffer = Ctx.vkInstanceBuffer;
609609 MemInfo.buffer = Ctx.vkScratchBuffer;
610610 vkGetBufferMemoryRequirements2(Ctx.vkDevice, &MemInfo, &MemReqs);
611611
612 MemSize = Align(MemSize, MemReqs.memoryRequirements.alignment);
612 MemSize = AlignUp(MemSize, MemReqs.memoryRequirements.alignment);
613613 MemSize += MemReqs.memoryRequirements.size;
614614 MemTypeBits |= MemReqs.memoryRequirements.memoryTypeBits;
615615
616616 BindMem.emplace_back([&Ctx, MemReqs, &BufferInfo](VkDeviceMemory Mem, VkDeviceSize& Offset) {
617 Offset = Align(Offset, MemReqs.memoryRequirements.alignment);
617 Offset = AlignUp(Offset, MemReqs.memoryRequirements.alignment);
618618 vkBindBufferMemory(Ctx.vkDevice, Ctx.vkScratchBuffer, Mem, Offset);
619619 Offset += MemReqs.memoryRequirements.size;
620620 BufferInfo.buffer = Ctx.vkScratchBuffer;
627627 {
628628 const Uint32 GroupSize = Ctx.RayTracingProps.shaderGroupHandleSize + ShaderRecordSize;
629629
630 BuffCI.size = Align(GroupSize, Ctx.RayTracingProps.shaderGroupBaseAlignment);
631 BuffCI.size = Align(BuffCI.size + GroupSize * NumMissShaders, Ctx.RayTracingProps.shaderGroupBaseAlignment);
632 BuffCI.size = Align(BuffCI.size + GroupSize * NumHitShaders, Ctx.RayTracingProps.shaderGroupBaseAlignment);
630 BuffCI.size = AlignUp(GroupSize, Ctx.RayTracingProps.shaderGroupBaseAlignment);
631 BuffCI.size = AlignUp(BuffCI.size + GroupSize * NumMissShaders, Ctx.RayTracingProps.shaderGroupBaseAlignment);
632 BuffCI.size = AlignUp(BuffCI.size + GroupSize * NumHitShaders, Ctx.RayTracingProps.shaderGroupBaseAlignment);
633633
634634 res = vkCreateBuffer(Ctx.vkDevice, &BuffCI, nullptr, &Ctx.vkSBTBuffer);
635635 ASSERT_GE(res, VK_SUCCESS);
638638 MemInfo.buffer = Ctx.vkSBTBuffer;
639639 vkGetBufferMemoryRequirements2(Ctx.vkDevice, &MemInfo, &MemReqs);
640640
641 MemSize = Align(MemSize, MemReqs.memoryRequirements.alignment);
641 MemSize = AlignUp(MemSize, MemReqs.memoryRequirements.alignment);
642642 MemSize += MemReqs.memoryRequirements.size;
643643 MemTypeBits |= MemReqs.memoryRequirements.memoryTypeBits;
644644
645645 BindMem.emplace_back([&Ctx, MemReqs, &BufferInfo](VkDeviceMemory Mem, VkDeviceSize& Offset) {
646 Offset = Align(Offset, MemReqs.memoryRequirements.alignment);
646 Offset = AlignUp(Offset, MemReqs.memoryRequirements.alignment);
647647 vkBindBufferMemory(Ctx.vkDevice, Ctx.vkSBTBuffer, Mem, Offset);
648648 Offset += MemReqs.memoryRequirements.size;
649649 BufferInfo.buffer = Ctx.vkSBTBuffer;
849849 vkGetRayTracingShaderGroupHandlesKHR(Ctx.vkDevice, Ctx.vkPipeline, RAYGEN_GROUP, 1, ShaderGroupHandleSize, ShaderHandle);
850850 vkCmdUpdateBuffer(Ctx.vkCmdBuffer, Ctx.vkSBTBuffer, Offset, ShaderGroupHandleSize, ShaderHandle);
851851
852 Offset = Align(Offset + RaygenShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
852 Offset = AlignUp(Offset + RaygenShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
853853 MissShaderBindingTable.deviceAddress = Ctx.vkSBTBufferAddress + Offset;
854854 MissShaderBindingTable.size = ShaderGroupHandleSize;
855855 MissShaderBindingTable.stride = ShaderGroupHandleSize;
857857 vkGetRayTracingShaderGroupHandlesKHR(Ctx.vkDevice, Ctx.vkPipeline, MISS_GROUP, 1, ShaderGroupHandleSize, ShaderHandle);
858858 vkCmdUpdateBuffer(Ctx.vkCmdBuffer, Ctx.vkSBTBuffer, Offset, ShaderGroupHandleSize, ShaderHandle);
859859
860 Offset = Align(Offset + MissShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
860 Offset = AlignUp(Offset + MissShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
861861 HitShaderBindingTable.deviceAddress = Ctx.vkSBTBufferAddress + Offset;
862862 HitShaderBindingTable.size = ShaderGroupHandleSize;
863863 HitShaderBindingTable.stride = ShaderGroupHandleSize;
10091009 vkGetRayTracingShaderGroupHandlesKHR(Ctx.vkDevice, Ctx.vkPipeline, RAYGEN_GROUP, 1, ShaderGroupHandleSize, ShaderHandle);
10101010 vkCmdUpdateBuffer(Ctx.vkCmdBuffer, Ctx.vkSBTBuffer, Offset, ShaderGroupHandleSize, ShaderHandle);
10111011
1012 Offset = Align(Offset + RaygenShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
1012 Offset = AlignUp(Offset + RaygenShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
10131013 MissShaderBindingTable.deviceAddress = Ctx.vkSBTBufferAddress + Offset;
10141014 MissShaderBindingTable.size = ShaderGroupHandleSize;
10151015 MissShaderBindingTable.stride = ShaderGroupHandleSize;
10171017 vkGetRayTracingShaderGroupHandlesKHR(Ctx.vkDevice, Ctx.vkPipeline, MISS_GROUP, 1, ShaderGroupHandleSize, ShaderHandle);
10181018 vkCmdUpdateBuffer(Ctx.vkCmdBuffer, Ctx.vkSBTBuffer, Offset, ShaderGroupHandleSize, ShaderHandle);
10191019
1020 Offset = Align(Offset + MissShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
1020 Offset = AlignUp(Offset + MissShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
10211021 HitShaderBindingTable.deviceAddress = Ctx.vkSBTBufferAddress + Offset;
10221022 HitShaderBindingTable.size = ShaderGroupHandleSize;
10231023 HitShaderBindingTable.stride = ShaderGroupHandleSize;
11671167 vkGetRayTracingShaderGroupHandlesKHR(Ctx.vkDevice, Ctx.vkPipeline, RAYGEN_GROUP, 1, ShaderGroupHandleSize, ShaderHandle);
11681168 vkCmdUpdateBuffer(Ctx.vkCmdBuffer, Ctx.vkSBTBuffer, Offset, ShaderGroupHandleSize, ShaderHandle);
11691169
1170 Offset = Align(Offset + RaygenShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
1170 Offset = AlignUp(Offset + RaygenShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
11711171 MissShaderBindingTable.deviceAddress = Ctx.vkSBTBufferAddress + Offset;
11721172 MissShaderBindingTable.size = ShaderGroupHandleSize;
11731173 MissShaderBindingTable.stride = ShaderGroupHandleSize;
11751175 vkGetRayTracingShaderGroupHandlesKHR(Ctx.vkDevice, Ctx.vkPipeline, MISS_GROUP, 1, ShaderGroupHandleSize, ShaderHandle);
11761176 vkCmdUpdateBuffer(Ctx.vkCmdBuffer, Ctx.vkSBTBuffer, Offset, ShaderGroupHandleSize, ShaderHandle);
11771177
1178 Offset = Align(Offset + MissShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
1178 Offset = AlignUp(Offset + MissShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
11791179 HitShaderBindingTable.deviceAddress = Ctx.vkSBTBufferAddress + Offset;
11801180 HitShaderBindingTable.size = ShaderGroupHandleSize;
11811181 HitShaderBindingTable.stride = ShaderGroupHandleSize;
14231423 vkGetRayTracingShaderGroupHandlesKHR(Ctx.vkDevice, Ctx.vkPipeline, RAYGEN_GROUP, 1, ShaderGroupHandleSize, ShaderHandle);
14241424 vkCmdUpdateBuffer(Ctx.vkCmdBuffer, Ctx.vkSBTBuffer, Offset, ShaderGroupHandleSize, ShaderHandle);
14251425
1426 Offset = Align(Offset + RaygenShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
1426 Offset = AlignUp(Offset + RaygenShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
14271427 MissShaderBindingTable.deviceAddress = Ctx.vkSBTBufferAddress + Offset;
14281428 MissShaderBindingTable.size = ShaderRecordSize;
14291429 MissShaderBindingTable.stride = ShaderRecordSize;
14311431 vkGetRayTracingShaderGroupHandlesKHR(Ctx.vkDevice, Ctx.vkPipeline, MISS_GROUP, 1, ShaderGroupHandleSize, ShaderHandle);
14321432 vkCmdUpdateBuffer(Ctx.vkCmdBuffer, Ctx.vkSBTBuffer, Offset, ShaderGroupHandleSize, ShaderHandle);
14331433
1434 Offset = Align(Offset + MissShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
1434 Offset = AlignUp(Offset + MissShaderBindingTable.size, Ctx.RayTracingProps.shaderGroupBaseAlignment);
14351435 HitShaderBindingTable.deviceAddress = Ctx.vkSBTBufferAddress + Offset;
14361436 HitShaderBindingTable.size = ShaderRecordSize * HitGroupCount;
14371437 HitShaderBindingTable.stride = ShaderRecordSize;
6262 }
6363 }
6464
65 TEST(Common_Align, Align)
65 TEST(Common_Align, AlignUp)
6666 {
67 EXPECT_EQ(Align(Uint8{0}, Uint8{16}), Uint8{0});
68 EXPECT_EQ(Align(Uint8{1}, Uint8{16}), Uint8{16});
69 EXPECT_EQ(Align(Uint8{15}, Uint8{16}), Uint8{16});
70 EXPECT_EQ(Align(Uint8{16}, Uint8{16}), Uint8{16});
71 EXPECT_EQ(Align(Uint8{17}, Uint8{16}), Uint8{32});
67 EXPECT_EQ(AlignUp(Uint8{0}, Uint8{16}), Uint8{0});
68 EXPECT_EQ(AlignUp(Uint8{1}, Uint8{16}), Uint8{16});
69 EXPECT_EQ(AlignUp(Uint8{15}, Uint8{16}), Uint8{16});
70 EXPECT_EQ(AlignUp(Uint8{16}, Uint8{16}), Uint8{16});
71 EXPECT_EQ(AlignUp(Uint8{17}, Uint8{16}), Uint8{32});
7272
7373 for (Uint32 i = 0; i < 1024; ++i)
7474 {
7777 auto Aligned = (i / Alignment) * Alignment;
7878 if (Aligned < i) Aligned += Alignment;
7979
80 EXPECT_EQ(Align(i, Alignment), Aligned);
80 EXPECT_EQ(AlignUp(i, Alignment), Aligned);
8181 }
8282
83 EXPECT_EQ(Align((Uint64{1} << 63) + 1, Uint64{1024}), (Uint64{1} << 63) + 1024);
83 EXPECT_EQ(AlignUp((Uint64{1} << 63) + 1, Uint64{1024}), (Uint64{1} << 63) + 1024);
8484 }
8585
8686 TEST(Common_Align, AlignDown)
105105
106106 TEST(Common_Align, AlignPtr)
107107 {
108 EXPECT_EQ(Align((void*)0x1000, size_t{16}), (void*)0x1000);
109 EXPECT_EQ(Align((void*)0x1001, size_t{16}), (void*)0x1010);
110 EXPECT_EQ(Align((void*)0x100F, size_t{16}), (void*)0x1010);
111 EXPECT_EQ(Align((void*)0x1010, size_t{16}), (void*)0x1010);
112 EXPECT_EQ(Align((void*)0x1011, size_t{16}), (void*)0x1020);
108 EXPECT_EQ(AlignUp((void*)0x1000, size_t{16}), (void*)0x1000);
109 EXPECT_EQ(AlignUp((void*)0x1001, size_t{16}), (void*)0x1010);
110 EXPECT_EQ(AlignUp((void*)0x100F, size_t{16}), (void*)0x1010);
111 EXPECT_EQ(AlignUp((void*)0x1010, size_t{16}), (void*)0x1010);
112 EXPECT_EQ(AlignUp((void*)0x1011, size_t{16}), (void*)0x1020);
113113
114114 for (uintptr_t i = 0; i < 1024; ++i)
115115 {
118118 auto Aligned = (i / Alignment) * Alignment;
119119 if (Aligned < i) Aligned += Alignment;
120120
121 EXPECT_EQ(Align((void*)(0x1000 + i), (size_t)Alignment), (void*)(0x1000 + Aligned));
121 EXPECT_EQ(AlignUp((void*)(0x1000 + i), (size_t)Alignment), (void*)(0x1000 + Aligned));
122122 }
123123 }
124124
139139 Allocator.AddSpace(32, 8192);
140140 Allocator.Reserve();
141141 auto* Ptr = Allocator.Allocate(32, 8192);
142 EXPECT_EQ(Ptr, Align(Ptr, 8192));
142 EXPECT_EQ(Ptr, AlignUp(Ptr, 8192));
143143 }
144144
145145 TEST(Common_FixedLinearAllocator, ObjectConstruction)
173173
174174 {
175175 auto* pUI8 = Allocator.Construct<uint8_t>(uint8_t{15});
176 EXPECT_EQ(pUI8, Align(pUI8, alignof(uint8_t)));
176 EXPECT_EQ(pUI8, AlignUp(pUI8, alignof(uint8_t)));
177177 EXPECT_EQ(*pUI8, uint8_t{15});
178178 }
179179
180180 {
181181 auto* pUI16 = Allocator.Copy(uint16_t{31});
182 EXPECT_EQ(pUI16, Align(pUI16, alignof(uint16_t)));
182 EXPECT_EQ(pUI16, AlignUp(pUI16, alignof(uint16_t)));
183183 EXPECT_EQ(*pUI16, uint16_t{31});
184184 }
185185
195195
196196 {
197197 auto* pUI32 = Allocator.ConstructArray<uint32_t>(5, 100u);
198 EXPECT_EQ(pUI32, Align(pUI32, alignof(uint32_t)));
198 EXPECT_EQ(pUI32, AlignUp(pUI32, alignof(uint32_t)));
199199 for (size_t i = 0; i < 5; ++i)
200200 EXPECT_EQ(pUI32[i], 100u);
201201 }
204204 std::array<uint64_t, 3> RefArray = {11, 120, 1300};
205205
206206 auto* pUI64 = Allocator.CopyArray<uint64_t>(RefArray.data(), RefArray.size());
207 EXPECT_EQ(pUI64, Align(pUI64, alignof(uint64_t)));
207 EXPECT_EQ(pUI64, AlignUp(pUI64, alignof(uint64_t)));
208208 for (size_t i = 0; i < RefArray.size(); ++i)
209209 EXPECT_EQ(pUI64[i], RefArray[i]);
210210 }
216216
217217 {
218218 auto* pObj = Allocator.Allocate<TObj1k>(4);
219 EXPECT_EQ(pObj, Align(pObj, alignof(TObj1k)));
219 EXPECT_EQ(pObj, AlignUp(pObj, alignof(TObj1k)));
220220 }
221221 }
222222