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authorEgor Yusov <egor.yusov@gmail.com>2019-03-18 16:35:22 +0000
committerEgor Yusov <egor.yusov@gmail.com>2019-03-18 16:35:22 +0000
commit8356e8a99fbb4eda182e838e202c11530ed81403 (patch)
treed15c365da03ab64b1776dea43d1e2b754d03365b /Graphics/GraphicsEngineD3D12
parentMerge from master (diff)
downloadDiligentCore-8356e8a99fbb4eda182e838e202c11530ed81403.tar.gz
DiligentCore-8356e8a99fbb4eda182e838e202c11530ed81403.zip
Renamed USAGE_CPU_ACCESSIBLE to USAGE_STAGING
Diffstat (limited to 'Graphics/GraphicsEngineD3D12')
-rw-r--r--Graphics/GraphicsEngineD3D12/src/BufferD3D12Impl.cpp4
-rw-r--r--Graphics/GraphicsEngineD3D12/src/DeviceContextD3D12Impl.cpp12
2 files changed, 8 insertions, 8 deletions
diff --git a/Graphics/GraphicsEngineD3D12/src/BufferD3D12Impl.cpp b/Graphics/GraphicsEngineD3D12/src/BufferD3D12Impl.cpp
index eaf96a64..4e32275a 100644
--- a/Graphics/GraphicsEngineD3D12/src/BufferD3D12Impl.cpp
+++ b/Graphics/GraphicsEngineD3D12/src/BufferD3D12Impl.cpp
@@ -67,7 +67,7 @@ BufferD3D12Impl :: BufferD3D12Impl(IReferenceCounters* pRefCounters,
if (m_Desc.BindFlags & BIND_UNIFORM_BUFFER)
AlignmentMask = 255;
- if (m_Desc.Usage == USAGE_CPU_ACCESSIBLE)
+ if (m_Desc.Usage == USAGE_STAGING)
{
if (m_Desc.CPUAccessFlags != CPU_ACCESS_WRITE && m_Desc.CPUAccessFlags != CPU_ACCESS_READ)
LOG_BUFFER_ERROR_AND_THROW("Exactly one of the CPU_ACCESS_WRITE or CPU_ACCESS_READ flags must be specified for a cpu-accessible buffer")
@@ -117,7 +117,7 @@ BufferD3D12Impl :: BufferD3D12Impl(IReferenceCounters* pRefCounters,
auto *pd3d12Device = pRenderDeviceD3D12->GetD3D12Device();
D3D12_HEAP_PROPERTIES HeapProps;
- if (m_Desc.Usage == USAGE_CPU_ACCESSIBLE)
+ if (m_Desc.Usage == USAGE_STAGING)
HeapProps.Type = m_Desc.CPUAccessFlags == CPU_ACCESS_READ ? D3D12_HEAP_TYPE_READBACK : D3D12_HEAP_TYPE_UPLOAD;
else
HeapProps.Type = D3D12_HEAP_TYPE_DEFAULT;
diff --git a/Graphics/GraphicsEngineD3D12/src/DeviceContextD3D12Impl.cpp b/Graphics/GraphicsEngineD3D12/src/DeviceContextD3D12Impl.cpp
index 353b9676..eba7ac5d 100644
--- a/Graphics/GraphicsEngineD3D12/src/DeviceContextD3D12Impl.cpp
+++ b/Graphics/GraphicsEngineD3D12/src/DeviceContextD3D12Impl.cpp
@@ -941,7 +941,7 @@ namespace Diligent
LOG_WARNING_MESSAGE_ONCE("Mapping CPU buffer for reading on D3D12 currently requires flushing context and idling GPU");
Flush();
m_pDevice.RawPtr<RenderDeviceD3D12Impl>()->IdleGPU();
- VERIFY(BuffDesc.Usage == USAGE_CPU_ACCESSIBLE, "Buffer must be created as USAGE_CPU_ACCESSIBLE to be mapped for reading");
+ VERIFY(BuffDesc.Usage == USAGE_STAGING, "Buffer must be created as USAGE_STAGING to be mapped for reading");
D3D12_RANGE MapRange;
MapRange.Begin = 0;
MapRange.End = BuffDesc.uiSizeInBytes;
@@ -949,9 +949,9 @@ namespace Diligent
}
else if(MapType == MAP_WRITE)
{
- if (BuffDesc.Usage == USAGE_CPU_ACCESSIBLE)
+ if (BuffDesc.Usage == USAGE_STAGING)
{
- VERIFY(pd3d12Resource != nullptr, "USAGE_CPU_ACCESSIBLE buffer mapped for writing must intialize D3D12 resource");
+ VERIFY(pd3d12Resource != nullptr, "USAGE_STAGING buffer mapped for writing must intialize D3D12 resource");
if (MapFlags & MAP_FLAG_DISCARD)
{
@@ -976,7 +976,7 @@ namespace Diligent
}
else
{
- LOG_ERROR("Only USAGE_DYNAMIC and USAGE_CPU_ACCESSIBLE D3D12 buffers can be mapped for writing");
+ LOG_ERROR("Only USAGE_DYNAMIC and USAGE_STAGING D3D12 buffers can be mapped for writing");
}
}
else if(MapType == MAP_READ_WRITE)
@@ -1005,9 +1005,9 @@ namespace Diligent
}
else if(MapType == MAP_WRITE)
{
- if (BuffDesc.Usage == USAGE_CPU_ACCESSIBLE)
+ if (BuffDesc.Usage == USAGE_STAGING)
{
- VERIFY(pd3d12Resource != nullptr, "USAGE_CPU_ACCESSIBLE buffer mapped for writing must intialize D3D12 resource");
+ VERIFY(pd3d12Resource != nullptr, "USAGE_STAGING buffer mapped for writing must intialize D3D12 resource");
pd3d12Resource->Unmap(0, nullptr);
}
else if (BuffDesc.Usage == USAGE_DYNAMIC)