new port layout

3 files changed, 46 insertions, 0 deletions

diff --git a/lib/local.pretty/Edge4_Female.kicad_mod b/lib/local.pretty/Edge4_Female.kicad_mod
new file mode 100644
index 0000000..3336711
--- /dev/null
+++ b/lib/local.pretty/Edge4_Female.kicad_mod
@@ -0,0 +1,23 @@
+(footprint "Edge4_Female" (version 20211014) (generator pcbnew)
+  (layer "F.Cu")
+  (tedit 62D85BB2)
+  (attr through_hole exclude_from_pos_files exclude_from_bom)
+  (fp_text reference "REF**" (at 12.8 0 90 unlocked) (layer "F.Fab")
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 681a5a87-2d8d-46fc-b2de-b6b012fa2902)
+  )
+  (fp_text value "Edge4_Female" (at 8.4 0 90) (layer "F.Fab")
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 300a0c9d-a81a-4f88-afcb-1b2202b101a1)
+  )
+  (fp_line (start 9.6 -4) (end 10.6 -4) (layer "F.SilkS") (width 0.15) (tstamp 3c43057a-1e5f-43b9-8de6-b02531931111))
+  (fp_line (start 10.75 -6.206515) (end 10.75 6.206515) (layer "Edge.Cuts") (width 0.12) (tstamp 8deb9f73-95c0-42e1-93d2-787e65fbad08))
+  (pad "1" connect roundrect (at 9.75 -3 90) (size 1 1) (layers "F.Cu") (roundrect_rratio 0.2) (tstamp 02d7c8a1-22ed-4deb-ba48-cb93f50b7f3b))
+  (pad "1" thru_hole roundrect (at 10.75 -3 90) (size 1.5 2.25) (drill 0.75) (property pad_prop_castellated) (layers *.Cu *.Mask) (roundrect_rratio 0.2) (tstamp 825db4e4-0570-4418-9d35-0ca609330e31))
+  (pad "2" connect roundrect (at 9.75 -1 90) (size 1 1) (layers "F.Cu") (roundrect_rratio 0.2) (tstamp 0f5b378e-226c-41a8-b5d6-ae38442e2964))
+  (pad "2" thru_hole roundrect (at 10.75 -1 90) (size 1.5 2.25) (drill 0.75) (property pad_prop_castellated) (layers *.Cu *.Mask) (roundrect_rratio 0.2) (tstamp 16d74238-afba-427d-91fb-8987095c167b))
+  (pad "3" thru_hole roundrect (at 10.75 1 90) (size 1.5 2.25) (drill 0.75) (property pad_prop_castellated) (layers *.Cu *.Mask) (roundrect_rratio 0.2) (tstamp 69291d21-b86e-46e5-b39f-537f471e4600))
+  (pad "3" connect roundrect (at 9.75 1 90) (size 1 1) (layers "F.Cu") (roundrect_rratio 0.2) (tstamp 6c93f1e0-384c-4aa5-a130-3724482a7468))
+  (pad "4" thru_hole roundrect (at 10.75 3 90) (size 1.5 2.25) (drill 0.75) (property pad_prop_castellated) (layers *.Cu *.Mask) (roundrect_rratio 0.2) (tstamp 74f81324-106c-4a39-80f4-436e85497936))
+  (pad "4" connect roundrect (at 9.75 3 90) (size 1 1) (layers "F.Cu") (roundrect_rratio 0.2) (tstamp b49ad0aa-6b6f-4eff-a9b5-718fd7e6a7c4))
+)
diff --git a/lib/local.pretty/Edge4_Male.kicad_mod b/lib/local.pretty/Edge4_Male.kicad_mod
new file mode 100644
index 0000000..30db41b
--- /dev/null
+++ b/lib/local.pretty/Edge4_Male.kicad_mod
@@ -0,0 +1,23 @@
+(footprint "Edge4_Male" (version 20211014) (generator pcbnew)
+  (layer "F.Cu")
+  (tedit 62D85B64)
+  (attr through_hole exclude_from_pos_files exclude_from_bom)
+  (fp_text reference "REF**" (at -12.8 0 90 unlocked) (layer "F.Fab")
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 681a5a87-2d8d-46fc-b2de-b6b012fa2902)
+  )
+  (fp_text value "Edge4_Male" (at -8.4 0 90) (layer "F.Fab")
+    (effects (font (size 1 1) (thickness 0.15)))
+    (tstamp 300a0c9d-a81a-4f88-afcb-1b2202b101a1)
+  )
+  (fp_line (start -9.6 -4) (end -10.6 -4) (layer "F.SilkS") (width 0.15) (tstamp 3c43057a-1e5f-43b9-8de6-b02531931111))
+  (fp_line (start -10.75 -6.206515) (end -10.75 6.206515) (layer "Edge.Cuts") (width 0.12) (tstamp 8deb9f73-95c0-42e1-93d2-787e65fbad08))
+  (pad "1" connect roundrect (at -9.75 -3 270) (size 1 1) (layers "F.Cu") (roundrect_rratio 0.2) (tstamp 02d7c8a1-22ed-4deb-ba48-cb93f50b7f3b))
+  (pad "1" thru_hole roundrect (at -10.75 -3 270) (size 1.5 2.25) (drill 0.75) (property pad_prop_castellated) (layers *.Cu *.Mask) (roundrect_rratio 0.2) (tstamp 825db4e4-0570-4418-9d35-0ca609330e31))
+  (pad "2" connect roundrect (at -9.75 -1 270) (size 1 1) (layers "F.Cu") (roundrect_rratio 0.2) (tstamp 0f5b378e-226c-41a8-b5d6-ae38442e2964))
+  (pad "2" thru_hole roundrect (at -10.75 -1 270) (size 1.5 2.25) (drill 0.75) (property pad_prop_castellated) (layers *.Cu *.Mask) (roundrect_rratio 0.2) (tstamp 16d74238-afba-427d-91fb-8987095c167b))
+  (pad "3" thru_hole roundrect (at -10.75 1 270) (size 1.5 2.25) (drill 0.75) (property pad_prop_castellated) (layers *.Cu *.Mask) (roundrect_rratio 0.2) (tstamp 69291d21-b86e-46e5-b39f-537f471e4600))
+  (pad "3" connect roundrect (at -9.75 1 270) (size 1 1) (layers "F.Cu") (roundrect_rratio 0.2) (tstamp 6c93f1e0-384c-4aa5-a130-3724482a7468))
+  (pad "4" thru_hole roundrect (at -10.75 3 270) (size 1.5 2.25) (drill 0.75) (property pad_prop_castellated) (layers *.Cu *.Mask) (roundrect_rratio 0.2) (tstamp 74f81324-106c-4a39-80f4-436e85497936))
+  (pad "4" connect roundrect (at -9.75 3 270) (size 1 1) (layers "F.Cu") (roundrect_rratio 0.2) (tstamp b49ad0aa-6b6f-4eff-a9b5-718fd7e6a7c4))
+)
diff --git a/lib/s-ol b/lib/s-ol
-Subproject 6c32938354be647a94d454c104057ec6887a0e0
+Subproject b034e9aebc2a5a523af7e15b9b5c620cc23b739