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== code 0x80400000
main:
# print device tree info.
# OpenSBI calls us with a1 set to the start of the DTB
  # load 0x10000000 (UART0) into a0
  37/lui a/rd/a0 10000/imm20

  13/opi 15/rd/s5 0/subop/add b/rs/a1 0/imm12

  # check magic == 0xd00dfeed
  37/lui 6/rd/t1 edfe1dd0/imm20hi
  13/opi 6/rd/t1 0/subop/add 6/rs/t1 edfe0dd0/imm12lo
  03/load 5/rd/t0 2/width/w 15/rs/s5 0/imm12
  63/branch 1/subop/!= 5/rs/t0 6/rs/t1 err_magic/off13

  37/lui b/rd/a1 S_TOTALSZ/imm20hi
  13/opi b/rd/a1 0/subop/add b/rs/a1 S_TOTALSZ/imm12lo
  6f/jal 1/rd/ra print/off21

  03/load b/rd/a1 2/width/w 15/rs/s5 4/imm12
  6f/jal 1/rd/ra bswapw/off21
  6f/jal 1/rd/ra print_hex_word/off21
  6f/jal 1/rd/ra printnl/off21

  37/lui b/rd/a1 S_VER/imm20hi
  13/opi b/rd/a1 0/subop/add b/rs/a1 S_VER/imm12lo
  6f/jal 1/rd/ra print/off21

  03/load b/rd/a1 2/width/w 15/rs/s5 14/imm12
  6f/jal 1/rd/ra bswapw/off21
  6f/jal 1/rd/ra print_hex_word/off21
  6f/jal 1/rd/ra printnl/off21

  37/lui b/rd/a1 S_LC_VER/imm20hi
  13/opi b/rd/a1 0/subop/add b/rs/a1 S_LC_VER/imm12lo
  6f/jal 1/rd/ra print/off21

  03/load b/rd/a1 2/width/w 15/rs/s5 18/imm12
  6f/jal 1/rd/ra bswapw/off21
  6f/jal 1/rd/ra print_hex_word/off21
  6f/jal 1/rd/ra printnl/off21

  37/lui b/rd/a1 S_BOOT_CPU/imm20hi
  13/opi b/rd/a1 0/subop/add b/rs/a1 S_BOOT_CPU/imm12lo
  6f/jal 1/rd/ra print/off21

  03/load b/rd/a1 2/width/w 15/rs/s5 2c/imm12
  6f/jal 1/rd/ra bswapw/off21
  6f/jal 1/rd/ra print_hex_word/off21
  6f/jal 1/rd/ra printnl/off21

exit:
# system reset (via SBI extension SRST)
  # a7 = ext id, a6 = fid, a0 = 0, a1 = 0
  37/lui 11/rd/a7 53525/imm20
  13/opi 11/rd/a7 0/subop/add 11/rs/a7 354/imm12
  33/opr 0/mode/norm 10/rd/a6 0/subop/add 0/rs/x0 0/rs/x0
  33/opr 0/mode/norm a/rd/a0 0/subop/add 0/rs/x0 0/rs/x0
  33/opr 0/mode/norm b/rd/a1 0/subop/add 0/rs/x0 0/rs/x0
  # ECALL
  73/system 0/subop/priv 0/funct12/ecall

err_magic:
  37/lui b/rd/a1 E_MAGIC/imm20hi
  13/opi b/rd/a1 0/subop/add b/rs/a1 E_MAGIC/imm12lo
  6f/jal 1/rd/ra print/off21
  6f/jal 0/rd/x0 exit/off21

bswapw:
# byte-order-swap word in a1
  # srli    a1, a0, 8
  # lui     a2, 16
  # addi    a2, a2, -256
  # and     a1, a1, a2
  13/opi 5/rd/t0 5/subop/srl b/rs/a1 8/imm12
  37/lui 6/rd/t1 10/imm20
  13/opi 6/rd/t1 0/subop/add 6/rs/t1 -100/imm12
  33/opr 5/rd/t0 7/subop/and 0/mode/norm 5/rs/t0 6/rs/t1
  #  srli    a2, a0, 24
  #  or      a1, a1, a2
  13/opi 6/rd/t1 5/subop/srl b/rs/a1 18/imm12
  33/opr 5/rd/t0 6/subop/or 0/mode/norm 5/rs/t0 6/rs/t1
  # slli    a2, a0, 8
  # lui     a3, 4080
  # and     a2, a2, a3
  13/opi 6/rd/t1 1/subop/sll 0/mode/norm b/rs/a1 8/imm5
  37/lui 7/rd/t2 ff0/imm20
  33/opr 6/rd/t1 7/subop/and 0/mode/norm 6/rs/t1 7/rs/t2
  # slli    a0, a0, 24
  # or      a0, a0, a2
  # or      a0, a0, a1
  13/opi b/rd/a1 1/subop/sll 0/mode/norm b/rs/a1 18/imm5
  33/opr b/rd/a1 6/subop/or 0/mode/norm b/rs/a1 6/rs/t1
  33/opr b/rd/a1 6/subop/or 0/mode/norm b/rs/a1 5/rs/t0
  # ret
  67/jalr 0/rd/x0 0/subop 1/rs/ra 0/off12

printnl:
  13/opi 6/rd/t1 0/subop/add 0/rs/x0 0a/imm12
printnl:spin:
  # spin if FIFO is full (thr_emtpy = UART+5 & 0x20)
  03/load 7/rd/t2 4/width/bu a/rs/a0 5/imm12
  13/opi 7/rd/t2 7/subop/and 7/rs/t2 20/imm12
  63/branch 0/subop/== 7/rs/t2 0/rs/x0 printnl:spin/off13
  # print char
  23/store 2/width/w a/rs/a0 0/off12 6/rs/t1
  # return
  67/jalr 0/rd/x0 0/subop 1/rs/ra 0/off12

print:
print:loop:
  # load unsigned byte at a1
  03/load 6/rd/t1 4/width/bu b/rs/a1 0/imm12
  # break loop if zero
  63/branch 0/subop/== 6/rs/t1 0/rs/x0 print:break/off13
print:spin:
  # spin if FIFO is full (thr_emtpy = UART+5 & 0x20)
  03/load 7/rd/t2 4/width/bu a/rs/a0 5/imm12
  13/opi 7/rd/t2 7/subop/and 7/rs/t2 20/imm12
  63/branch 0/subop/== 7/rs/t2 0/rs/x0 print:spin/off13
  # print char
  23/store 2/width/w a/rs/a0 0/off12 6/rs/t1
  # increment a1
  13/opi b/rd/a1 0/subop/add b/rs/a1 1/imm12
  # jump back up
  6f/jal 0/rd/x0 print:loop/off21
print:break:
  # return
  67/jalr 0/rd/x0 0/subop 1/rs/ra 0/off12

print_hex_word:
  13/opi 8/rd/s0 0/subop/add b/rs/a1 0/imm12
  13/opi 9/rd/s1 0/subop/add 0/rs/x0 1c/imm12
  13/opi 12/rd/s2 0/subop/add 1/rs/ra 0/imm12
print_hex_word:loop:
  # shift
  33/opr b/rd/a1 5/subop/srl 8/rs/s0 0/funct7/norm 9/rs/s1
  6f/jal 1/rd/ra print_hex_dgt/off21

  # break if last shift
  63/branch 9/rs/s1 0/subop/== 0/rs/x0 print_hex_word:break/off13

  # subtract shift count, loop
  13/opi 9/rd/s1 0/subop/add 9/rs/s1 -4/imm12
  6f/jal 0/rd/x0 print_hex_word:loop/off21
  print_hex_word:break:
  # return
  67/jalr 0/rd/x0 0/subop 12/rs/s2 0/off12

print_hex_dgt:
  # a1 = a1 & 0xf
  13/opi b/rd/a1 7/subop/and b/rs/a1 f/imm12
  # t1 = 0x3a
  13/opi 6/rd/t1 0/subop/add 0/rs/x0 3a/imm12

  # add 0x30 (ascii '0') / 0x61 (ascii 'a')
  13/opi b/rd/a1 0/subop/add b/rs/a1 30/imm12
  63/branch b/rs/a1 4/subop/< 6/rs/t1 print_hex_dgt:spin/off13
  13/opi b/rd/a1 0/subop/add b/rs/a1 27/imm12

print_hex_dgt:spin:
  # spin if FIFO is full (thr_emtpy = UART+5 & 0x20)
  03/load 7/rd/t2 4/width/bu a/rs/a0 5/imm12
  13/opi 7/rd/t2 7/subop/and 7/rs/t2 20/imm12
  63/branch 0/subop/== 7/rs/t2 0/rs/x0 print_hex_dgt:spin/off13

  # print char
  23/store 2/width/w a/rs/a0 0/off12 b/rs/a1

  # return
  67/jalr 0/rd/x0 0/subop 1/rs/ra 0/off12

== data 0x80500000
E_MAGIC:
  @@/string "Invalid DTB magic!\n\0"
S_TOTALSZ:
  @@/string "Total Size: \0"
S_VER:
  @@/string "DTB Format Version: \0"
S_LC_VER:
  @@/string "Last Compatible: \0"
S_BOOT_CPU:
  @@/string "Boot CPU id: \0"
S_DASH:
  @@/string " - \0"