close to working AUIPC+JALR jump

3 files changed, 14 insertions, 3 deletions

diff --git a/ex.elf b/ex.elf
index ba24a18..19bb3e1 100644
--- a/ex.elf
+++ b/ex.elf
diff --git a/ex.subv b/ex.subv
index bf26df0..eb01363 100644
--- a/ex.subv
+++ b/ex.subv
@@ -12,5 +12,12 @@ main:
   # store 0x0a (\n) in UART0+0
   13/opi 0/subop/add 6/rd/t1 0/rs/x0 0a/imm12
   23/store 2/subop/word 5/rs/t0 6/rs/t1 0/off12
-  # jump back up to the top
-  6f/jal 0/rd/x0 main/off21
+  # jump back up to the top (three versions):
+  # a) jal 21bit relative (with 0th bit forced to 0)
+  #   6f/jal 0/rd/x0 main/off21
+  # b) auipc+jalr 32bit relative (note label offset)
+     17/auipc 7/rd/t2 main/off32
+     67/jalr 0/subop 0/rd/x0 7/rs/t2 main+4/off32
+  # c) lui+jalr 32bit absolute
+  #   37/lui 7/rd/t2 main/imm32
+  #   67/jalr 0/subop 0/rd/x0 7/rs/t2 main/imm32
diff --git a/format.py b/format.py
index 942f4f8..5776da8 100755
--- a/format.py
+++ b/format.py
@@ -135,12 +135,16 @@ def pack_i(instr):
     '13/7 06/5 0/3 00/5 label/imm12/[11:0]'
     """
     (op, sub, rd, rs, imm) = instr
+    op_tag = op[1]
     op  = bits.u(subv.untag(op), 7)
     sub = bits.u(subv.untag(sub, 'subop'), 3)
     rd  = bits.u(subv.untag(rd, 'rd'), 5)
     rs  = bits.u(subv.untag(rs, 'rs'), 5)
     if subv.is_reference(imm):
-        imm = bits.ref(imm, slice(11, 0))
+        if op_tag == 'jalr':
+            imm = bits.ref(imm, slice(12, 1))
+        else:
+            imm = bits.ref(imm, slice(11, 0))
     else:
         imm = bits.i(subv.untag(imm, 'imm12'), 12)