diff options
| author | s-ol <s+removethis@s-ol.nu> | 2021-07-14 09:05:04 +0000 |
|---|---|---|
| committer | s-ol <s+removethis@s-ol.nu> | 2021-07-14 09:05:08 +0000 |
| commit | 98b4472451d9e915fa324b2e0517a2f092511273 (patch) | |
| tree | 5cc734bc6759043268a7e0725d208b78e52fef7f | |
| parent | start working on DTB printer (diff) | |
| download | subv-98b4472451d9e915fa324b2e0517a2f092511273.tar.gz subv-98b4472451d9e915fa324b2e0517a2f092511273.zip | |
rename CSR instruction part /csr12 → /csr
| -rw-r--r-- | examples/ask_name.subv | 2 | ||||
| -rw-r--r-- | examples/hello_world.subv | 2 | ||||
| -rwxr-xr-x | validate.py | 10 |
3 files changed, 7 insertions, 7 deletions
diff --git a/examples/ask_name.subv b/examples/ask_name.subv index 4be18eb..160efc5 100644 --- a/examples/ask_name.subv +++ b/examples/ask_name.subv @@ -12,7 +12,7 @@ == code 0x80400000 # load mhartid CSR into t0, trap all but first Hart - # 73/system 5/rd/t0 2/funct3/csrrs 0/rs/x0 f14/csr12/mhartid + # 73/system 5/rd/t0 2/funct3/csrrs 0/rs/x0 f14/csr/mhartid # 63/branch 1/subop/!= 5/rs/t0 0/rs/x0 0/off13 main: diff --git a/examples/hello_world.subv b/examples/hello_world.subv index b85739d..f74bc64 100644 --- a/examples/hello_world.subv +++ b/examples/hello_world.subv @@ -1,6 +1,6 @@ == code 0x80400000 # load mhartid CSR into t0, trap all but first Hart - # 73/system 5/rd/t0 2/funct3/csrrs 0/rs/x0 f14/csr12/mhartid + # 73/system 5/rd/t0 2/funct3/csrrs 0/rs/x0 f14/csr/mhartid # 63/branch 1/subop/!= 5/rs/t0 0/rs/x0 0/off13 main: diff --git a/validate.py b/validate.py index 9950d07..955608b 100755 --- a/validate.py +++ b/validate.py @@ -436,9 +436,9 @@ def validate_system(inputs): """ validate system operations. - >>> validate_system(subv.parse('73/system 0/dest/x0 1/subop/csrrw 5/rs/t0 afe/csr12')['instr']) + >>> validate_system(subv.parse('73/system 0/dest/x0 1/subop/csrrw 5/rs/t0 afe/csr')['instr']) [(115, 'i'), (0, 'rd'), (1, 'funct3'), (5, 'rs'), (2814, 'imm12')] - >>> validate_system(subv.parse('73/system 0/dest/x0 5/subop/csrrwi 7/imm5 afe/csr12')['instr']) + >>> validate_system(subv.parse('73/system 0/dest/x0 5/subop/csrrwi 7/imm5 afe/csr')['instr']) [(115, 'i'), (0, 'rd'), (5, 'funct3'), (7, 'imm5'), (2814, 'imm12')] >>> validate_system(subv.parse('73/system 0/subop/priv 0/funct12/ecall')['instr']) @@ -446,11 +446,11 @@ def validate_system(inputs): >>> validate_system(subv.parse('73/system 0/subop/priv 1/funct12/ebreak')['instr']) [(115, 'i'), (0, 'rd'), (0, 'funct3'), (0, 'rs'), (1, 'imm12')] - >>> validate_system(subv.parse('73/system 0/dest/x0 1/subop/csrrw 7/imm5 afe/csr12')['instr']) + >>> validate_system(subv.parse('73/system 0/dest/x0 1/subop/csrrw 7/imm5 afe/csr')['instr']) Traceback (most recent call last): ... ValueError: Expected a register with label rs/rs1/src - >>> validate_system(subv.parse('73/system 0/dest/x0 5/subop/csrrwi 5/rs/t0 afe/csr12')['instr']) + >>> validate_system(subv.parse('73/system 0/dest/x0 5/subop/csrrwi 5/rs/t0 afe/csr')['instr']) Traceback (most recent call last): ... ValueError: Expected an immediate with size 5 @@ -475,7 +475,7 @@ def validate_system(inputs): src = try_pop_zeroes(inputs, ["rs", "rs1", "src"]) else: dest = validate_reg(inputs, ["rd", "dest"]) - imm = pop_immediate(inputs, 12, ["imm", "csr"]) + imm = pop_part(inputs, ["imm12", "csr"], "CSR-specifier") if funct[2][-1] == "i": src = pop_immediate(inputs, 5) |