diff options
| author | s-ol <s+removethis@s-ol.nu> | 2021-07-09 12:47:34 +0000 |
|---|---|---|
| committer | s-ol <s+removethis@s-ol.nu> | 2021-07-09 12:47:34 +0000 |
| commit | 6783dba868d8c7da9f3c2319204d994adfc64927 (patch) | |
| tree | f27d0c3947187479607ec160f2ebfb7d92a7b34b /examples | |
| parent | wip more validation logic (diff) | |
| download | subv-6783dba868d8c7da9f3c2319204d994adfc64927.tar.gz subv-6783dba868d8c7da9f3c2319204d994adfc64927.zip | |
update examples
Diffstat (limited to 'examples')
| -rw-r--r-- | examples/ask_name.subv | 87 | ||||
| -rw-r--r-- | examples/ex.elf | bin | 8224 -> 8224 bytes | |||
| -rw-r--r-- | examples/ex.format | 12 | ||||
| -rw-r--r-- | examples/ex.pack | 12 | ||||
| -rw-r--r-- | examples/ex.subv | 12 | ||||
| -rw-r--r-- | examples/ex.survey | 12 | ||||
| -rw-r--r-- | examples/ex.valid | 12 | ||||
| -rw-r--r-- | examples/hello_world.subv | 19 |
8 files changed, 83 insertions, 83 deletions
diff --git a/examples/ask_name.subv b/examples/ask_name.subv index 6350188..f54213f 100644 --- a/examples/ask_name.subv +++ b/examples/ask_name.subv @@ -12,7 +12,7 @@ == code 0x80400000 # load mhartid CSR into t0, trap all but first Hart - # 73/system 5/rd/t0 2/funct3/csrrs 0/rs/x0 f14/imm12/mhartid + # 73/system 5/rd/t0 2/funct3/csrrs 0/rs/x0 f14/csr12/mhartid # 63/branch 1/subop/!= 5/rs/t0 0/rs/x0 0/off13 main: @@ -20,26 +20,26 @@ main: # print HELLO_WHATSURNAME 37/lui a/rd/a0 HELLO_WHATSURNAME/imm20hi - 13/opi 0/subop/add a/rd/a0 a/rs/a0 HELLO_WHATSURNAME/imm12lo + 13/opi a/rd/a0 0/subop/add a/rs/a0 HELLO_WHATSURNAME/imm12lo 6f/jal 1/rd/ra print/off21 37/lui a/rd/a0 Name/imm20hi - 13/opi 0/subop/add a/rd/a0 a/rs/a0 Name/imm12lo + 13/opi a/rd/a0 0/subop/add a/rs/a0 Name/imm12lo 6f/jal 1/rd/ra read/off21 # print HELLO_ 37/lui a/rd/a0 HELLO_/imm20hi - 13/opi 0/subop/add a/rd/a0 a/rs/a0 HELLO_/imm12lo + 13/opi a/rd/a0 0/subop/add a/rs/a0 HELLO_/imm12lo 6f/jal 1/rd/ra print/off21 # print Name 37/lui a/rd/a0 Name/imm20hi - 13/opi 0/subop/add a/rd/a0 a/rs/a0 Name/imm12lo + 13/opi a/rd/a0 0/subop/add a/rs/a0 Name/imm12lo 6f/jal 1/rd/ra print/off21 # print NICETOMEETU 37/lui a/rd/a0 NICETOMEETU/imm20hi - 13/opi 0/subop/add a/rd/a0 a/rs/a0 NICETOMEETU/imm12lo + 13/opi a/rd/a0 0/subop/add a/rs/a0 NICETOMEETU/imm12lo 6f/jal 1/rd/ra print/off21 # infinite loop @@ -47,96 +47,95 @@ main: init: # initialize UART0 - # load 0x10010000 (UART0) into t0 - 37/lui 5/rd/t0 0x10000/imm20 + # load 0x10000000 (UART0) into t0 + 37/lui 5/rd/t0 10000/imm20 # disable interrupts - 23/store 0/width/byte 5/rs/t0 0/rs/x0 1/off12 + 23/store 0/width/b 5/rs/t0 1/off12 0/rs/x0 # enable DLAB - 13/opi 0/subop/add 6/rd/t1 0/rs/x0 80/imm12 - 23/store 0/width/byte 5/rs/t0 6/rs/t1 3/off12 + 13/opi 6/rd/t1 0/subop/add 0/rs/x0 80/imm12 + 23/store 0/width/b 5/rs/t0 3/off12 6/rs/t1 # max speed = 38400bps - 13/opi 0/subop/add 6/rd/t1 0/rs/x0 3/imm12 - 23/store 0/width/byte 5/rs/t0 6/rs/t1 0/off12 - 23/store 0/width/byte 5/rs/t0 0/rs/x0 1/off12 + 13/opi 6/rd/t1 0/subop/add 0/rs/x0 3/imm12 + 23/store 0/width/b 5/rs/t0 0/off12 6/rs/t1 + 23/store 0/width/b 5/rs/t0 1/off12 0/rs/x0 # disable DLAB - 13/opi 0/subop/add 6/rd/t1 0/rs/x0 3/imm12 - 23/store 0/width/byte 5/rs/t0 6/rs/t1 3/off12 + 13/opi 6/rd/t1 0/subop/add 0/rs/x0 3/imm12 + 23/store 0/width/b 5/rs/t0 3/off12 6/rs/t1 # enable fifo, clear, watermark=14b - 13/opi 0/subop/add 6/rd/t1 0/rs/x0 c7/imm12 - 23/store 0/width/byte 5/rs/t0 6/rs/t1 2/off12 + 13/opi 6/rd/t1 0/subop/add 0/rs/x0 c7/imm12 + 23/store 0/width/b 5/rs/t0 2/off12 6/rs/t1 # set dtr, srs, aux2 - 13/opi 0/subop/add 6/rd/t1 0/rs/x0 b/imm12 - 23/store 0/width/byte 5/rs/t0 6/rs/t1 4/off12 + 13/opi 6/rd/t1 0/subop/add 0/rs/x0 b/imm12 + 23/store 0/width/b 5/rs/t0 4/off12 6/rs/t1 - 13/opi 0/subop/add 6/rd/t1 0/rs/x0 1/imm12 - 23/store 0/width/byte 5/rs/t0 6/rs/t1 1/off12 + 13/opi 6/rd/t1 0/subop/add 0/rs/x0 1/imm12 + 23/store 0/width/b 5/rs/t0 1/off12 6/rs/t1 # return 67/jalr 0/subop 0/rd/x0 1/rs/ra 0/off12 old: - # load 3 into t1 - 13/opi 0/subop/add 6/rd/t1 0/rs/x0 3/imm12 # set "data terminal ready" and "request to send" bits in MCR - 23/store 0/width/byte 5/rs/t0 6/rs/t1 4/off12 + 13/opi 6/rd/t1 0/subop/add 0/rs/x0 3/imm12 + 23/store 0/width/b 5/rs/t0 4/off12 6/rs/t1 # return 67/jalr 0/subop 0/rd/x0 1/rs/ra 0/off12 print: # print a C-string from a0 - # load 0x10010000 (UART0) into t0 - 37/lui 5/rd/t0 0x10000/imm20 + # load 0x10000000 (UART0) into t0 + 37/lui 5/rd/t0 10000/imm20 print:loop: - # load unsigned byte at a0 - 03/load 4/subop/byte 6/rd/t1 a/rs/a0 0/imm12 + # load unsigned byte at [a0] into t1 + 03/load 6/rd/t1 4/width/bu a/rs/a0 0/off12 # break loop if zero 63/branch 0/subop/== 6/rs/t1 0/rs/x0 print:break/off13 print:spin: # spin if FIFO is full (thr_empty = UART+5 & 0x20) - 03/load 4/subop/byte 7/rd/t2 5/rs/t0 5/imm12 - 13/opi 7/subop/and 7/rd/t2 7/rs/t2 20/imm12 + 03/load 7/rd/t2 4/width/bu 5/rs/t0 5/off12 + 13/opi 7/rd/t2 7/subop/and 7/rs/t2 20/imm12 63/branch 0/subop/== 7/rs/t2 0/rs/x0 print:spin/off13 - # print char - 23/store 0/width/byte 5/rs/t0 6/rs/t1 0/off12 + # store char from t1 at [t0] + 23/store 0/width/b 5/rs/t0 0/off12 6/rs/t1 # increment a0 - 13/opi 0/subop/add a/rd/a0 a/rs/a0 1/imm12 + 13/opi a/rd/a0 0/subop/add a/rs/a0 1/imm12 # jump back up 6f/jal 0/rd/x0 print:loop/off21 print:break: # return - 67/jalr 0/subop 0/rd/x0 1/rs/ra 0/off12 + 67/jalr 0/rd/x0 0/subop 1/rs/ra 0/off12 read: # read a C-string into a0 # load 0x10000000 (UART0) into t0 37/lui 5/rd/t0 0x10000/imm20 # load 0x0a (\n) into t1 - 13/opi 0/subop/add 6/rd/t1 0/rs/x0 0a/imm12 + 13/opi 6/rd/t1 0/subop/add 0/rs/x0 0a/imm12 read:loop: # spin if FIFO is empty (data_ready = UART+5 & 1) - 03/load 4/subop/byte 7/rd/t2 5/rs/t0 5/imm12 - 13/opi 7/subop/and 7/rd/t2 7/rs/t2 1/imm12 + 03/load 7/rd/t2 4/width/bu 5/rs/t0 5/imm12 + 13/opi 7/rd/t2 7/subop/and 7/rs/t2 1/imm12 63/branch 0/subop/== 7/rs/t2 0/rs/x0 read:loop/off13 - # load unsigned byte into t2 - 03/load 4/subop/byte 7/rd/t2 5/rs/t0 0/imm12 + # read char at [t0] into t2 + 03/load 7/rd/t2 4/width/bu 5/rs/t0 0/imm12 # break loop if newline (t2 == t1) 63/branch 0/subop/== 7/rs/t2 6/rs/t1 read:break/off13 - # store char at a0 - 23/store 0/width/byte a/rs/a0 7/rs/t2 0/off12 + # store char from t1 at [a0] + 23/store 0/width/b a/rs/a0 7/rs/t2 0/off12 # increment a0 - 13/opi 0/subop/add a/rd/a0 a/rs/a0 1/imm12 + 13/opi a/rd/a0 0/subop/add a/rs/a0 1/imm12 # jump back up 6f/jal 0/rd/x0 read:loop/off21 read:break: # return - 67/jalr 0/subop 0/rd/x0 1/rs/ra 0/off12 + 67/jalr 0/rd/x0 0/subop 1/rs/ra 0/off12 == data 0x80500000 diff --git a/examples/ex.elf b/examples/ex.elf Binary files differindex a509aaf..b06a01f 100644 --- a/examples/ex.elf +++ b/examples/ex.elf diff --git a/examples/ex.format b/examples/ex.format index 6727dd1..a8781aa 100644 --- a/examples/ex.format +++ b/examples/ex.format @@ -1,16 +1,16 @@ -== code 0x80000000 +== code 0x80400000 # repeatedly print "Hi\n" # main: -# load 0x10010000 (UART0) into t0 -37/7 05/5 10010/20 +# load 0x10000000 (UART0) into t0 +37/7 05/5 10000/20 # store 0x48 (H) in UART0+0 13/7 06/5 0/3 00/5 048/12 -23/7 00/5 2/3 05/5 06/5 00/7 +23/7 00/5 0/3 05/5 06/5 00/7 # store 0x69 (i) in UART0+0 13/7 06/5 0/3 00/5 069/12 -23/7 00/5 2/3 05/5 06/5 00/7 +23/7 00/5 0/3 05/5 06/5 00/7 # store 0x0a (\n) in UART0+0 13/7 06/5 0/3 00/5 00a/12 -23/7 00/5 2/3 05/5 06/5 00/7 +23/7 00/5 0/3 05/5 06/5 00/7 # jump back up to the top 6f/7 00/5 ff/8 1/1 3f2/10 1/1 diff --git a/examples/ex.pack b/examples/ex.pack index e0cb8b9..777deaf 100644 --- a/examples/ex.pack +++ b/examples/ex.pack @@ -1,16 +1,16 @@ -== code 0x80000000 +== code 0x80400000 # repeatedly print "Hi\n" # main: -# load 0x10010000 (UART0) into t0 -b7 02 01 10 +# load 0x10000000 (UART0) into t0 +b7 02 00 10 # store 0x48 (H) in UART0+0 13 03 80 04 -23 a0 62 00 +23 80 62 00 # store 0x69 (i) in UART0+0 13 03 90 06 -23 a0 62 00 +23 80 62 00 # store 0x0a (\n) in UART0+0 13 03 a0 00 -23 a0 62 00 +23 80 62 00 # jump back up to the top 6f f0 5f fe diff --git a/examples/ex.subv b/examples/ex.subv index 408dabb..a65643e 100644 --- a/examples/ex.subv +++ b/examples/ex.subv @@ -1,16 +1,16 @@ -== code 0x80000000 +== code 0x80400000 # repeatedly print "Hi\n" main: - # load 0x10010000 (UART0) into t0 - 37/lui 5/rd/t0 0x10010/imm20 + # load 0x10000000 (UART0) into t0 + 37/lui 5/rd/t0 10000/imm20 # store 0x48 (H) in UART0+0 13/opi 0/subop/add 6/rd/t1 0/rs/x0 48/imm12 - 23/store 2/width/word 5/rs/t0 6/rs/t1 0/off12 + 23/store 0/width/byte 5/rs/t0 0/off12 6/rs/t1 # store 0x69 (i) in UART0+0 13/opi 0/subop/add 6/rd/t1 0/rs/x0 69/imm12 - 23/store 2/width/word 5/rs/t0 6/rs/t1 0/off12 + 23/store 0/width/byte 5/rs/t0 0/off12 6/rs/t1 # store 0x0a (\n) in UART0+0 13/opi 0/subop/add 6/rd/t1 0/rs/x0 0a/imm12 - 23/store 2/width/word 5/rs/t0 6/rs/t1 0/off12 + 23/store 0/width/byte 5/rs/t0 0/off12 6/rs/t1 # jump back up to the top 6f/jal 0/rd/x0 main/off21 diff --git a/examples/ex.survey b/examples/ex.survey index e30860c..90d0d07 100644 --- a/examples/ex.survey +++ b/examples/ex.survey @@ -1,16 +1,16 @@ -== code 0x80000000 +== code 0x80400000 # repeatedly print "Hi\n" # main: -# load 0x10010000 (UART0) into t0 -37/u 5/rd 10010/imm20 +# load 0x10000000 (UART0) into t0 +37/u 5/rd 10000/imm20 # store 0x48 (H) in UART0+0 13/i 6/rd 0/funct3 0/rs 48/imm12 -23/s 5/rs1 0/imm12 2/funct3 6/rs2 +23/s 0/funct3 5/rs1 0/imm12 6/rs2 # store 0x69 (i) in UART0+0 13/i 6/rd 0/funct3 0/rs 69/imm12 -23/s 5/rs1 0/imm12 2/funct3 6/rs2 +23/s 0/funct3 5/rs1 0/imm12 6/rs2 # store 0x0a (\n) in UART0+0 13/i 6/rd 0/funct3 0/rs a/imm12 -23/s 5/rs1 0/imm12 2/funct3 6/rs2 +23/s 0/funct3 5/rs1 0/imm12 6/rs2 # jump back up to the top 6f/j 0/rd -1c/imm21 diff --git a/examples/ex.valid b/examples/ex.valid index 1652954..f05ddb6 100644 --- a/examples/ex.valid +++ b/examples/ex.valid @@ -1,16 +1,16 @@ -== code 0x80000000 +== code 0x80400000 # repeatedly print "Hi\n" main: -# load 0x10010000 (UART0) into t0 -37/u 5/rd 10010/imm20 +# load 0x10000000 (UART0) into t0 +37/u 5/rd 10000/imm20 # store 0x48 (H) in UART0+0 13/i 6/rd 0/funct3 0/rs 48/imm12 -23/s 5/rs1 0/imm12 2/funct3 6/rs2 +23/s 0/funct3 5/rs1 0/imm12 6/rs2 # store 0x69 (i) in UART0+0 13/i 6/rd 0/funct3 0/rs 69/imm12 -23/s 5/rs1 0/imm12 2/funct3 6/rs2 +23/s 0/funct3 5/rs1 0/imm12 6/rs2 # store 0x0a (\n) in UART0+0 13/i 6/rd 0/funct3 0/rs a/imm12 -23/s 5/rs1 0/imm12 2/funct3 6/rs2 +23/s 0/funct3 5/rs1 0/imm12 6/rs2 # jump back up to the top 6f/j 0/rd main/off21 diff --git a/examples/hello_world.subv b/examples/hello_world.subv index aa044ae..84ad0b2 100644 --- a/examples/hello_world.subv +++ b/examples/hello_world.subv @@ -1,13 +1,14 @@ == code 0x80400000 - # trap all but first Hart (a0 = mhartid) - # 63/branch 1/subop/!= a/rs/a0 0/rs/x0 0/off13 + # load mhartid CSR into t0, trap all but first Hart + # 73/system 5/rd/t0 2/funct3/csrrs 0/rs/x0 f14/csr12/mhartid + # 63/branch 1/subop/!= 5/rs/t0 0/rs/x0 0/off13 main: # a0 = &message # . load high bits 37/lui a/rd/a0 Message/imm20hi # . add low bits - 13/opi 0/subop/add a/rd/a0 a/rs/a0 Message/imm12lo + 13/opi a/rd/a0 0/subop/add a/rs/a0 Message/imm12lo # call print 6f/jal 1/rd/ra print/off21 loop: @@ -19,23 +20,23 @@ print: 37/lui 5/rd/t0 0x10000/imm20 print:loop: # load unsigned byte at a0 - 03/load 4/subop/byte 6/rd/t1 a/rs/a0 0/imm12 + 03/load 6/rd/t1 4/width/bu a/rs/a0 0/imm12 # break loop if zero 63/branch 0/subop/== 6/rs/t1 0/rs/x0 print:break/off13 print:spin: # spin if FIFO is full (thr_emtpy = UART+5 & 0x20) - 03/load 4/subop/byte 7/rd/t2 5/rs/t0 5/imm12 - 13/opi 7/subop/and 7/rd/t2 7/rs/t2 20/imm12 + 03/load 7/rd/t2 4/width/bu 5/rs/t0 5/imm12 + 13/opi 7/rd/t2 7/subop/and 7/rs/t2 20/imm12 63/branch 0/subop/== 7/rs/t2 0/rs/x0 print:spin/off13 # print char - 23/store 2/width/word 5/rs/t0 6/rs/t1 0/off12 + 23/store 2/width/w 5/rs/t0 0/off12 6/rs/t1 # increment a0 - 13/opi 0/subop/add a/rd/a0 a/rs/a0 1/imm12 + 13/opi a/rd/a0 0/subop/add a/rs/a0 1/imm12 # jump back up 6f/jal 0/rd/x0 print:loop/off21 print:break: # return - 67/jalr 0/subop 0/rd/x0 1/rs/ra 0/off12 + 67/jalr 0/rd/x0 0/subop 1/rs/ra 0/off12 == data 0x80500000 Message: |
